US2004087153A1PendingUtilityA1

Method of etching a silicon-containing dielectric material

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Assignee: DU YANPriority: Oct 31, 2002Filed: Oct 31, 2002Published: May 6, 2004
Est. expiryOct 31, 2022(expired)· nominal 20-yr term from priority
Inventors:Yan DuMeihua ShenShashank Deshmukh
H10P 50/283H10P 50/71H01J 37/32174H01J 37/321
37
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Claims

Abstract

Disclosed herein is a method of pattern etching a layer of a silicon-containing dielectric material. The method employs a plasma source gas including CF 4 to CHF 3 , where the volumetric ratio of CF 4 to CHF 3 is within the range of about 2:3 to about 3:1; more typically, about 1:1 to about 2:1. Etching is performed at a process chamber pressure within the range of about 4 mTorr to about 60 mTorr. The method provides a selectivity for etching a silicon-containing dielectric layer relative to photoresist of 1.5:1 or better. The method also provides an etch profile sidewall angle ranging from 88° to 92° between said etched silicon-containing dielectric layer and an underlying horizontal layer. in the semiconductor structure. The method provides a smooth sidewall when used in combination with certain photoresists which are sensitive to 193 nm radiation.

Claims

exact text as granted — not AI-modified
We claim:  
     
         1 . A method of pattern etching a layer of a silicon-containing dielectric material on a semiconductor substrate, wherein a patterned photoresist layer overlies said silicon-containing dielectric layer, said method comprising exposing said silicon-containing dielectric layer to a plasma generated from a source gas comprising CF 4  and CHF 3 , wherein a volumetric ratio of CF 4  to CHF 3  is within a range of about 2:3 to about 3:1.  
     
     
         2 . The method of  claim 1 , wherein said silicon-containing dielectric material is selected from the group consisting of silicon nitride, silicon oxide, silicon oxynitride, and combinations thereof.  
     
     
         3 . The method of  claim 1 , wherein a volumetric ratio of CF 4  to CHF 3  is within the range of about 1:1 to about 2:1.  
     
     
         4 . The method of  claim 1 , wherein said plasma source gas composition comprises about 50 to about 75 volume % CF 4 , and about 25 to about 50 volume % CHF 3 .  
     
     
         5 . The method of  claim 4 , wherein said plasma source gas composition comprises about 50 to about 65 volume % CF 4 , and about 35 to about 50 volume % CHF 3 .  
     
     
         6 . The method of  claim 1 , wherein said photoresist is sensitive to 193 nm radiation.  
     
     
         7 . The method of  claim 1 , wherein said photoresist is based on alicyclic polymer resin technology.  
     
     
         8 . The method of  claim 1 , wherein said silicon-containing dielectric layer is used as a hard mask during pattern etching of an underlying semiconductor structure, wherein said semiconductor structure includes features having a feature size of about 0.15 μm or less.  
     
     
         9 . The method of  claim 1 , wherein said silicon-containing dielectric layer has a thickness within the range of about 1000 Å to about 2500 Å.  
     
     
         10 . The method of  claim 1 , wherein etching is performed at a process chamber pressure within the range of about 4 mTorr to about 60 mTorr.  
     
     
         11 . The method of  claim 10 , wherein etching is performed at a process chamber pressure within the range of about 20 mTorr to about 60 mTorr.  
     
     
         12 . The method of  claim 1 , wherein said method is performed in a semiconductor processing chamber having a decoupled plasma source.  
     
     
         13 . The method of  claim 1 , wherein said method provides a selectivity for etching said silicon-containing dielectric layer relative to said photoresist of at least 1.5:1.  
     
     
         14 . The method of  claim 1 , wherein said method provides an etch profile sidewall angle ranging from 88° to 92° between said etched silicon-containing dielectric layer and an underlying horizontal layer.  
     
     
         15 . The method of  claim 1 , wherein said method provides an etched sidewall roughness of about 5 nm or less.  
     
     
         16 . A method of pattern etching a layer of silicon nitride on a semiconductor substrate, wherein a patterned photoresist layer overlies said silicon nitride layer, said method comprising exposing said silicon nitride layer to a plasma generated from a source gas comprising CF 4  and CHF 3 , wherein a volumetric ratio of CF 4  to CHF 3  is within a range of about 2:3 to about 3:1.  
     
     
         17 . The method of  claim 1 , wherein a volumetric ratio of CF 4  to CHF 3  is within the range of about 1:1 to about 2:1.  
     
     
         18 . The method of  claim 1 , wherein said plasma source gas composition comprises about 50 to about 75 volume % CF 4 , and about 25 to about 50 volume % CHF 3.    
     
     
         19 . The method of  claim 18 , wherein said plasma source gas composition comprises about 50 to about 65 volume % CF 4 , and about 35 to about 50 volume % CHF 3 .  
     
     
         20 . The method of  claim 1 , wherein said photoresist is sensitive to 193 nm radiation.  
     
     
         21 . The method of  claim 1 , wherein said photoresist is based on alicyclic polymer resin technology.  
     
     
         22 . The method of  claim 1 , wherein said silicon nitride layer is used as a hard mask during pattern etching of an underlying semiconductor structure, wherein said semiconductor structure includes features having a feature size of about 0.15 μm or less.  
     
     
         23 . The method of  claim 1 , wherein said silicon nitride layer has a thickness within the range of about 1000 Å to about 2500 Å.  
     
     
         24 . The method of  claim 1 , wherein etching is performed at a process chamber pressure within the range of about 4 mTorr to about 60 mTorr.  
     
     
         25 . The method of  claim 24 , wherein etching is performed at a process chamber pressure within the range of about 20 mTorr to about 60 mTorr.  
     
     
         26 . The method of  claim 1 , wherein said method is performed in a semiconductor processing chamber having a decoupled plasma source.  
     
     
         27 . The method of  claim 1 , wherein said method provides a selectivity for etching said silicon nitride layer relative to said photoresist of at least 1.5:1.  
     
     
         28 . The method of  claim 1 , wherein said method provides an etch profile sidewall angle ranging from 88° to 92° between said etched silicon nitride layer and an underlying horizontal layer.  
     
     
         29 . The method of  claim 1 , wherein said method provides an etched sidewall roughness of about 5 nm or less.

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