Accumulator with variable limits

Abstract

The amplitudes of a signal on the microphone input of a telephone and a signal on the line input of the telephone are compared with each other and with two thresholds. The comparisons are sampled and the samples control an accumulator including an up-down counter and logic to provide adjustable thresholds. The count in the counter is compared with two other thresholds and the results of the comparisons are used to apply either variable data or fixed data to the counter.

What is claimed as the invention is:  
     
         1 . In an accumulator including an up-down counter and logic for preventing roll-over, the improvement comprising: 
 a first boundary for roll-over, wherein said boundary is less than the capacity of said up-down counter; and    a first multiplexer coupled to said logic for preventing roll-over for supplying a first predetermined count to said up-down counter when the count in said counter is incremented past said first boundary.    
     
     
         2 . The accumulator as set forth in  claim 1 , wherein said accumulator includes logic for preventing roll-under, said improvement further comprising: 
 a second boundary for roll-under, wherein said boundary is greater than the minimum count of said up-down counter; and    a second multiplexer coupled to said logic for preventing roll-under for supplying a second predetermined count to said up-down counter when said counter is decremented past said second boundary.    
     
     
         3 . The accumulator as set forth in  claim 2 , said improvement further comprising: 
 a third multiplexer coupled to said logic for providing reset data to said updown counter.    
     
     
         4 . The accumulator as set forth in  claim 1 , said improvement further comprising: 
 a second multiplexer coupled to said logic for providing reset data to said updown counter.    
     
     
         5 . The accumulator as set forth in  claim 1 , wherein said up-down counter counts in a range of less than −n to +n, wherein n is the capacity of the counter in either direction.  
     
     
         6 . The accumulator as set forth in  claim 1 , wherein said up-down counter counts up in increments of Δ, where Δ is an integer.  
     
     
         7 . The accumulator as set forth in  claim 6 , wherein said up-down counter counts down in increments of Δ, where Δ is an integer.  
     
     
         8 . The accumulator as set forth in  claim 1 , wherein said up-down counter counts down in increments of Δ, where Δ is an integer.  
     
     
         9 . In an accumulator including an up-down counter and logic for preventing roll-over, the improvement comprising: 
 a first multiplexer coupled to said counter and to a first count for supplying either the output from said counter or the first count to an output;    a first comparator coupled to said output for comparing the data on said output with a first threshold and producing a first logical output indicative of the comparison;    first logic means coupled to the first comparator and the first multiplexer for causing the first multiplexer to supply either the output from said counter or the first count to said output depending upon the state of said logical output    
     
     
         10 . The accumulator as set forth in  claim 9 , wherein said improvement further includes: 
 a second multiplexer coupled to said counter and to a second count for supplying either the output from said counter or the second count to said output;    a second comparator coupled to said output for comparing the data on said output with a second threshold and producing a second logical output indicative of the second comparison;    second logic means coupled to the second comparator and the second multiplexer for causing the second multiplexer to supply either the output from said counter or the second count to said output depending upon the state of said second logical output    
     
     
         11 . The accumulator as set forth in  claim 10 , wherein said improvement further includes: 
 a third multiplexer coupled to said counter and to a third count for supplying either the output from said counter or the third count to said output;    
     
     
         12 . The accumulator as set forth in  claim 11 , wherein said multiplexers are connected in cascade to produce a hierarchy of outputs wherein the third multiplexer overrides the second multiplexer and the second multiplexer overrides the first multiplexer.