Method for accommodating small minimum die in wire bonded area array packages

Abstract

An area array package comprising a die attach area for attaching a die to a substrate, a network of staggered bond fingers, and a network of bond islands for coupling bond wires between the bond islands and die bond pads is provided. A network of package leads, for example, a network of solder balls in a ball grid array, is depopulated to permit greater trace route flexibility and via placement within the substrate. Stacked die and multi-chip packages are also disclosed. A method for accommodating a high pin-count die in an area array package is also included.

We claim:  
     
         1 . A method for making a high pin-count die, comprising the steps of: 
 providing a substrate;    forming a die attach area onto the substrate for mounting a die, the die having at least one bond pad;    locating at least one bond island onto the substrate, and    connecting the bond pad to the bond island with a wire bond.    
     
     
         2 . The method of  claim 1 , further comprising the step of encapsulating the die.  
     
     
         3 . The method of  claim 1 , further comprising forming a trace between the bond island and a package lead located on the substrate.  
     
     
         4 . The method of  claim 3 , wherein the package lead is a solder ball included in a ball grid array (BGA).  
     
     
         5 . The method of  claim 3 , wherein the package lead is a land included in a land grid array (LGA).  
     
     
         6 . The method of  claim 1 , further comprising the step of depositing a bond finger onto the substrate.  
     
     
         7 . The method of  claim 6 , further comprising the step of bonding a wire between the bond finger and the bond pad.  
     
     
         8 . The method of  claim 6 , further comprising the step of forming a trace between the bond finger and a package lead.  
     
     
         9 . The method of  claim 8 , wherein the package lead is a solder ball included in a ball grid array (BGA).  
     
     
         10 . The method of  claim 8 , wherein the package lead is a land in a land grid array (LGA).  
     
     
         11 . The method of  claim 1 , further comprising the step of forming a plurality of die attach areas on the substrate for mounting a plurality of die.  
     
     
         12 . A method for providing an area array package, comprising the steps of: 
 providing a substrate;    attaching one or more die to the substrate;    wire bonding the die to the substrate; and    encapsulating the wires and die on the substrate.    
     
     
         13 . The method of  claim 12 , further comprising the step of coupling a plurality of solder balls to one of a plurality of bond islands located on the substrate.  
     
     
         14 . The method of  claim 13 , further comprising the step of coupling a plurality of bond fingers located on the substrate to the solder balls or the bond islands.  
     
     
         15 . A method of designing an area array package comprising the steps of: 
 determining a die size and I/O count;    laying out an in-line bond finger array;    determining a maximum wire length for bond fingers located at the corner of a substrate;    determining the number of bond fingers that need to be staggered to meet a maximum wire length constraint or to improve performance of the package;    enlarging staggered bond fingers to create bond islands; and    laying out a solder ball configuration for optimal location of the bond fingers, bond islands or vias to create ease of routing of trace placements.