US2004197960A1PendingUtilityA1

Micro-scale interconnect device with internal heat spreader and method for fabricating same

Priority: Nov 9, 2001Filed: Apr 22, 2004Published: Oct 7, 2004
Est. expiryNov 9, 2021(expired)· nominal 20-yr term from priority
H10W 40/255H10W 20/40H10D 86/201Y10T29/49222H01H 1/504H02N 1/006H01H 59/0009B81B 3/0051B81B 2201/014H01H 2059/0072H01H 61/04B81C 2201/0109B81B 2203/0118H01H 2061/006B81B 2207/07H01H 2001/0089B81C 1/0015B81B 3/0024B81B 2203/04B81C 2201/0108H01H 1/04B81B 2201/018H01H 2001/0042B81C 2201/0107H01H 2001/0063H02N 10/00
41
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A micro-scale interconnect device with internal heat spreader and method for fabricating same. The device includes first and second arrays of generally coplanar electrical communication lines. The first array is disposed generally along a first plane, and the second array is disposed generally along a second plane spaced from the first plane. The arrays are electrically isolated from each other. Embedded within the interconnect device is a heat spreader element. The heat spreader element comprises a dielectric material disposed in thermal contact with at least one of the arrays, and a layer of thermally conductive material embedded in the dielectric material. The device is fabricated by forming layers of electrically conductive, dielectric, and thermally conductive materials on a substrate. The layers are arranged to enable heat energy given off by current-carrying communication lines to be transferred away from the communication lines.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A method for fabricating a micro-scale device having internal heat spreading capability to reduce operating temperature, comprising the steps of forming a plurality of generally coplanar arrays of electrical transmission lines in a heterostructure, and embedding a thermally conductive element in one or more dielectric layers at a location of the heterostructure where a heat transfer path can be established in response to a thermal gradient generally directed from at least one of the arrays to the thermally conductive layer.  
     
     
         2 . The method according to  claim 1  wherein adjacent coplanar transmission lines of each array are separated from each other by a distance ranging from approximately to approximately 250 microns.  
     
     
         3 . The method according to  claim 1  comprising forming the arrays, the thermally conductive element, and the dielectric layers on an electrically isolated substrate.  
     
     
         4 . The method according to  claim 1  wherein the plurality of arrays comprises a first array and a second array, and the embedded thermally conductive element is interposed between the first and second arrays.  
     
     
         5 . The method according to  claim 4  wherein the thermally conductive element reduces capacitive coupling between the first and second arrays.  
     
     
         6 . The method according to  claim 1  wherein the thermally conductive element has an out-of-plane thickness ranging from approximately 0.1 to approximately 1 microns.  
     
     
         7 . The method according to  claim 1  wherein the thermally conductive element comprises a material selected from the group consisting of gold, copper, aluminum and diamond.  
     
     
         8 . A micro-scale device fabricated according to the method of  claim 1 .  
     
     
         9 . A method for fabricating a micro-scale device having internal heat spreading capability to reduce operating temperature, comprising the steps of: 
 (a) forming a first array of conductive elements on a substrate;    (b) depositing a first dielectric layer on the first array;    (c) depositing a layer of thermally conductive material on the first dielectric layer;    (d) depositing a second dielectric layer on the layer of thermally conductive material; and    (e) forming a second array of conductive elements on the second dielectric layer.    
     
     
         10 . A micro-scale device fabricated according to the method of  claim 9 .  
     
     
         11 . A method for conducting current in a micro-scale interconnect device at a reduced device operating temperature, comprising the steps of: 
 (a) conducting current in a micro-scale interconnect device comprising a first array of generally coplanar electrical communication lines disposed generally along a first plane, and a second array of generally coplanar electrical communication lines disposed generally along a second plane spaced from the first plane and electrically isolated from the first array, wherein the current is conducted through at least one of the communication lines of the arrays; and    (b) causing heat energy given off by the at least one current-conducting communication line to be transferred away from the arrays by providing a heat spreader element integrated with the interconnect device, the heat spreader element comprising a dielectric material disposed in thermal contact with at least one of the arrays, and a layer of thermally conductive material embedded in the dielectric material, whereby the heat energy is directed toward the heat spreader element in response to a thermal gradient created between the at least one current-conducting communication line and the heat spreader element.

Join the waitlist — get patent alerts

Track US2004197960A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.