Demodulator using cordic rotator-based digital phase locked loop for carrier frequency correction

Abstract

A digital data demodulator employs a cordic rotator-based, digital phase locked loop for carrier frequency tracking. Digitized I and Q channels downconverted to baseband using a fixed frequency oscillator are coupled to a digital cordic rotator. The cordic rotator iteratively executes pipelined phase-rotational adjustments of its digitized in-phase and quadrature inputs, in association with a pipelined reduction of the accumulated value of a phase angle vector code generated by digital phase error detection logic circuitry to which rotated I and Q outputs of the cordic rotator are applied. The phase error representative code vector is coupled through a digital loop filter as a reference angle input to the cordic rotator. The cordic rotator iteratively rotates the I and Q channel values that reduce the accumulated phase error to zero.

1 - 14 . (Canceled)  
     
     
         15 . A demodulator comprising: 
 an input port to which an input signal containing an encoded information signal modulated onto a carrier frequency, and containing in-phase and quadrature phase components, is applied;    a frequency converter coupled to receive said input signal and a fixed frequency signal proximate said carrier frequency and being operative to produce a frequency converted signal containing said encoded information signal; and    a frequency error correction loop coupled to process said frequency converted signal to produce a corrected frequency converted signal, said frequency error correction loop including 
 a cordic rotator to which said frequency converted signal is coupled, said cordic rotator containing a quadrant adjustment section and a phase angle adjustment section, said corrected frequency converted signal being output via an output port to downstream baseband processing circuitry for recovering said information signal,  
 a phase error detector coupled to the output of said cordic rotator and being operative to detect phase error in the output of said cordic rotator associated with a departure of said fixed frequency signal from said carrier frequency, and  
 a loop filter coupled to the output of said phase detector and through which a phase error signal generated by said phase error detector is coupled to said cordic rotator for controlling the operation thereof; and wherein  
   said output port from which said corrected frequency converted signal output by said cordic rotator is derived for application to said downstream baseband processing circuitry for recovering said information signal is coupled to the output of said cordic rotator of said frequency error correction loop.    
     
     
         16 . The demodulator according to  claim 15 , further including a digitizer which is operative to digitize said frequency converted signal produced by said frequency converter, and wherein said frequency error correction loop comprises a digital frequency error correction loop.  
     
     
         17 . The demodulator according to  claim 16 , wherein said cordic rotator is operative to perform iterative adjustments of digitized in-phase and quadrature components of said frequency converted signal to reduce said phase error detected by said phase error detector.  
     
     
         18 . A demodulator according to  claim 17 , wherein said cordic rotator is operative to iteratively rotate digitized in-phase and quadrature components of said frequency converted signal in accordance with a phase angle vector associated with said phase error detected by said phase error detector.  
     
     
         19 . A demodulator according to  claim 18 , wherein said cordic rotator is operative to iteratively adjust said digitized in-phase and quadrature components of said frequency converted signal in association with an iterative modification of said phase angle vector in a phase angle iteration loop to which said phase error signal generated by said phase error detector is coupled, over a prescribed number of processing cycles.  
     
     
         20 . The demodulator according to  claim 19 , wherein said quadrant adjustment section of said cordic rotator is upstream of in-phase and quadrature-phase channel rotation iteration loops, and said phase angle adjustment section is upstream of a phase angle iteration loop, said in-phase and quadrature-phase channel rotation iteration loops being operative to iteratively rotate respective quadrant adjusted values of said digitized in-phase and quadrature components of said frequency converted signal to values associated with said phase angle iteration loop iteratively reducing an adjusted value of said phase angle vector to a minimum value.  
     
     
         21 . A demodulator comprising: 
 a frequency converter coupled to receive an input signal containing an encoded information signal modulated onto a carrier frequency, and containing in-phase and quadrature phase components, and a fixed frequency signal proximate said carrier frequency, said frequency converter being operative to produce a frequency converted signal containing said encoded information signal; and    a frequency error correction loop coupled to process said frequency converted signal to produce a corrected frequency converted signal, which is output via an output port to downstream baseband processing circuitry for recovering said information signal, said frequency error correction loop including 
 a cordic rotator to which said frequency converted signal is coupled, said cordic rotator containing a quadrant adjustment section and a phase angle adjustment section, and having an output thereof coupled to said output port,  
 a phase error detector coupled to the output of said cordic rotator and being operative to detect phase error in the output of said cordic rotator associated with a departure of said fixed frequency signal from said carrier frequency, and  
 a loop filter coupled to the output of said phase detector and through which a phase error signal generated by said phase error detector is coupled to said cordic rotator for controlling the operation thereof.  
   
     
     
         22 . The demodulator according to  claim 21 , further including a digitizer which is operative to digitize said frequency converted signal produced by said frequency converter, and wherein said frequency error correction loop comprises a digital frequency error correction loop.  
     
     
         23 . The demodulator according to  claim 22 , wherein said cordic rotator is operative to perform iterative adjustments of digitized in-phase and quadrature components of said frequency converted signal to reduce said phase error detected by said phase error detector.  
     
     
         24 . A demodulator according to  claim 23 , wherein said cordic rotator is operative to iteratively rotate digitized in-phase and quadrature components of said frequency converted signal in accordance with a phase angle vector associated with said phase error detected by said phase error detector.  
     
     
         25 . A demodulator according to  claim 24 , wherein said cordic rotator is operative to iteratively adjust said digitized in-phase and quadrature components of said frequency converted signal in association with an iterative modification of said phase angle vector in a phase angle iteration loop to which said phase error signal generated by said phase error detector is coupled, over a prescribed number of processing cycles.  
     
     
         26 . The demodulator according to  claim 25 , wherein said quadrant adjustment section of said cordic rotator is upstream of in-phase and quadrature-phase channel rotation iteration loops, and said phase angle adjustment section is upstream of a phase angle iteration loop, said in-phase and quadrature-phase channel rotation iteration loops being operative to iteratively rotate respective quadrant adjusted values of said digitized in-phase and quadrature components of said frequency converted signal to values associated with said phase angle iteration loop iteratively reducing an adjusted value of said phase angle vector to a minimum value.