Integrated inductor in semiconductor manufacturing

Abstract

An integrated inductor is formed on an integrated circuit or other substrate. The inductor is formed of a stack of almost totally enclosed rings of conductive material in which each ring has a single gap. Vias connect adjacent rings on opposite sides of their gaps so as to form a coil shaped structure. The inductor has applications in filtering, in an oscillator, in an antenna, combined with an active detection circuit, combined with an electron source, in a microelectromechanical systems or MEMS, or the like. The inductor may be formed in a vertical orientation or in a horizontal orientation. Chemical mechanical polishing may be used for planarizing layers.

What is claimed is:  
     
         1 . An inductor formed on a substrate, comprising: 
 a plurality of rings of conductive material, wherein each of the rings has a single gap along its perimeter.    
     
     
         2 . The inductor of  claim 1 , wherein the rings are connected to adjacent rings by vias which extend from the proximity of the gaps of the rings.  
     
     
         3 . The inductor of  claim 1 , wherein the rings are generally circular.  
     
     
         4 . The inductor of  claim 1 , wherein the rings are generally oval.  
     
     
         5 . The inductor of  claim 1 , wherein the rings are generally square shaped.  
     
     
         6 . The inductor of  claim 1 , wherein the rings are generally rectangular.  
     
     
         7 . The inductor of  claim 1 , wherein the rings are polygonal.  
     
     
         8 . The inductor of  claim 1 , wherein the longitudinal axis of the inductor is oriented vertically with respect to the major plane of extension of the substrate.  
     
     
         9 . The inductor of  claim 1 , wherein the longitudinal axis of the inductor is oriented horizontally with respect to the major plane of extension of the substrate.  
     
     
         10 . The inductor of  claim 1 , wherein the rings of conductive material are formed from at least one of the group consisting of nickel, molybdenum, indium tin oxide, tantalum, tungsten, gold, copper, doped polysilicon, silicide, or silver.  
     
     
         11 . The inductor of  claim 1 , wherein the rings of conductive material are separated from one another by dielectric material.  
     
     
         12 . The inductor of  claim 1   1 , wherein the dielectric material is a nitride or an oxide.  
     
     
         13 . The inductor of  claim 11 , wherein the dielectric material is organic TEOS.  
     
     
         14 . The inductor of  claim 1 , wherein a core of conductive material is formed at the center of the inductor and extends along its longitudinal axis.  
     
     
         15 . The inductor of  claim 14 , wherein the core of conductive material is formed of copper, gold, or a ferromagnetic material.  
     
     
         16 . The inductor of  claim 15 , wherein the core of conductive material is encapsulated using a damascene process.  
     
     
         17 . A method for making an inductor on a substrate, comprising: 
 depositing a first layer of conductive material on a surface, the first layer of conductive material having a pattern;    depositing a first layer of dielectric material over the first layer of conductive material having a pattern;    forming a first through hole in the first layer of dielectric material;    filling the first through hole with a plug of conductive material; and    depositing a second layer of metal on the first layer of dielectric material, the second layer of conductive material having a pattern similar to the pattern of the first layer of conductive material.    
     
     
         18 . The method of  claim 17 , wherein the first layer of conductive material and the second layer of conductive material have patterns which form shapes of conductive material almost enclosing an inner area that has no conductive material, the first and second layers of conductive material each having gaps.  
     
     
         19 . The method of  claim 18 , wherein the gaps of the first layer of conductive material and the second layer of conductive material are rotationally offset from one another.  
     
     
         20 . The method of  claim 19 , wherein the conductive material filling the first through hole connects one side of the gap of the first layer of conductive material with the opposite side of the gap of the second layer of conductive material.  
     
     
         21 . The method of  claim 17 , wherein the method of making is a chemical vapor deposition (CVD) method.  
     
     
         22 . The method of  claim 17 , wherein the method is a molecular beam epitaxy (MBE) method.  
     
     
         23 . The method of  claim 17 , wherein the method is an atomic layer deposition (ALD) method.  
     
     
         24 . The method of  claim 17 , wherein the method is chemical mechanical polishing (CMP).  
     
     
         25 . The method of  claim 17 , wherein filling the through hole is accomplished by electroplating, sputtering, or evaporation.  
     
     
         26 . The method of  claim 17 , further comprising forming a core of conductive material within the area enclosed by the first layer of conductive material and the second layer of conductive material.  
     
     
         27 . An electronic circuit on a substrate, comprising: 
 an inductor formed as part of the substrate, wherein the inductor is formed of a plurality of almost entirely enclosed toroids of conductive material with a non-conductive interior, each toroid having a major plane of extension, wherein each toroid is conductively interconnected with an adjacent toroid by a conductor which extends generally in a plane perpendicular to the major plane of extension of the toroid.    
     
     
         28 . The electronic circuit of  claim 27 , wherein the electronic circuit is a filter.  
     
     
         29 . The electronic circuit of  claim 27 , wherein the electronic circuit is an oscillator.  
     
     
         30 . The electronic circuit of  claim 27 , wherein the electronic circuit further includes a resistive element.  
     
     
         31 . The electronic circuit of  claim 27 , wherein the electronic circuit further includes a capacitive element.  
     
     
         32 . The electronic circuit of  claim 27 , wherein the electronic circuit is a microelectromechanical system.  
     
     
         33 . A method for forming an inductor whose longitudinal axis is parallel to the major plane of extension of a substrate upon or in which it is formed, comprising: 
 depositing a first conductive layer and forming first parallel strips of conductive material of a first length;    successively depositing a least one layer of a dielectric material;    forming through holes through the at least one layer of dielectric material at the ends of the first length for each of the parallel strips;    filling the through hole with a plug of conductive material;    forming intermediate conductive strips of a second length at the ends of the first length for each of the parallel strips; and    depositing a final conductive layer and forming final parallel strips of conductive material of the first length,    wherein the resulting structure is coil shaped.    
     
     
         34 . The method of  claim 33 , further comprising forming gaps in portion of the first and final parallel strips or selectively removing or omitting intermediate conductive strips to form gaps in resulting rings or toroids.  
     
     
         35 . The method of  claim 34 , further comprising forming connecting strips of conductive material connecting a portion of the resulting rings or toroids, wherein the connecting strips in a direction generally perpendicular to the direction of extension of the first and final parallel strips.  
     
     
         36 . The method of  claim 35 , wherein the gap as viewed from successive ones of the rings or toroids appears to rotate at a generally fixed angle in the same direction of rotation.  
     
     
         37 . The method of  claim 33 , wherein at least some of the first and final parallel strips are L shaped.  
     
     
         38 . The method of  claim 33 , wherein the first parallel strips are not parallel to the final parallel strips.  
     
     
         39 . The method of  claim 38 , wherein the first parallel strips are each connected to adjacent ones of the final parallel strips, via plugs, to form a coil structure.  
     
     
         40 . The method of  claim 33 , further comprising forming connecting strips of conductive material between adjacent final parallel strips and forming connecting strips of conductive material between adjacent first parallel strips to form a coil structure.  
     
     
         41 . The method of  claim 40 , wherein the connecting strips are oriented in a slanting direction with respect to the major direction of extension of the first and final parallel strips.  
     
     
         42 . The method of  claim 40 , wherein the connecting strips are oriented in a perpendicular direction with respect to the major direction of extension of the first and final parallel strips.  
     
     
         43 . The method of  claim 33 , wherein, instead of forming plugs in the through holes, connecting strips of conductive material are selectively formed.  
     
     
         44 . The method of  claim 43 , wherein the connecting strips project perpendicularly from the major direction of extension of the first and final parallel strips.  
     
     
         45 . The method of  claim 33 , wherein the at least one dielectric layer consists of two or more dielectric layers, each having a through hole formed through it in a separate processing step and each through hole having a plug of conductive material formed in it in a separate processing step.  
     
     
         46 . The method of  claim 33 , further comprising forming a trench in the at least one dielectric layer between the ends of the first and final parallel strips.  
     
     
         47 . The method of  claim 46 , further comprising filling the trench with a conductive material to form a core to improve the overall inductance.  
     
     
         48 . The method of  claim 47 , further comprising using a damascene process to encapsulate the core with an encapsulating material.