US2004235219A1PendingUtilityA1

Plating apparatus, plating method, and method for manufacturing semiconductor device

Priority: Dec 18, 2000Filed: Dec 12, 2001Published: Nov 25, 2004
Est. expiryDec 18, 2020(expired)· nominal 20-yr term from priority
Inventors:Kei Okada
H10W 72/5524H05K 3/284C25D 17/28H10W 70/681H10W 72/0198H10W 72/90H10W 72/9415H10W 90/724H10W 72/20H10W 72/07251H10W 70/457H10W 74/114Y10T29/49146Y10T29/49144Y10T29/4913H10W 74/01H10P 95/00H03H 9/1078H03H 3/08
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Claims

Abstract

Problem: It has been desired to form a plurality of combinations of plating films continuously on a single transfer rail and to form a plating film having a high quality and a uniform thickness on the surfaces of a lead frame and leads. Solving Means: The plating apparatus is provided below the single transfer rail with a plurality of plating tanks, in which plating solution baths are disposed. By moving the plating solution between the plating tanks and the plating solution baths, it is possible to select a plating film to be formed on a conductive member ( 21 ). As a result, it is possible to form combinations of plating films on the conductive member ( 21 ) continuously by the single transfer rail.

Claims

exact text as granted — not AI-modified
1 . A plating apparatus having a plating pre-processing line and a plating line, wherein 
 the plating line has a plurality of plating baths and a desired plating bath from among the plating baths is provided with a plating liquid containment bath.    
     
     
         2 . A plating apparatus having a plating pre-processing line and a plating line, wherein 
 the plating line has a plurality of plating baths and all of the plating baths from among the plating baths, respectively, are provided with plating liquid containment baths.    
     
     
         3 . The plating apparatus according to  claim 1  or  2 , wherein 
 a plating film is formed on a conductive member in the plating baths of the plating line.  
 
     
     
         4 . The plating apparatus according to  claim 1  or  2 , wherein 
 the plating liquid containment baths are placed at positions lower than the plating baths.  
 
     
     
         5 . The plating apparatus according to  claim 1  or  2 , wherein 
 the plating baths are connected to the plating liquid containment baths via pipes so that a plating liquid is shifted through the pipes.  
 
     
     
         6 . The plating apparatus according to  claim 1  or  2 , wherein 
 a plating liquid contained in the plating bath are shifted to the plating liquid containment bath, or a plating liquid contained in the plating liquid containment bath are shifted to the plating bath according to a plating film formed on a conductive member.  
 
     
     
         7 . A plating method for forming a plating film by placing an electrode for supplying current and a conductive member on which the plating film is formed within a plating bath containing a desired plating liquid and by applying electricity, wherein 
 a current density flowing from the electrode is set at a value in a optimal range of the current density for the plating liquid and the conductive member is placed in an auxiliary plating rack and, then, the plating film is formed on the conductive member.    
     
     
         8 . The plating method according to  claim 7 , wherein 
 the conductive member and the auxiliary plating rack are set to be a same electric potential.    
     
     
         9 . The plating method according to  claim 7 , wherein 
 the auxiliary plating rack is positioned between the electrode and the conductive member.    
     
     
         10 . A manufacturing method for a semiconductor device, wherein a first plating film layer having a main metal material of Sn is formed on a lead having a main material of Cu or Fe—Ni, wherein a plating film layer having a main metal material of Sn—Bi is formed on an outermost surface of the lead, wherein 
 the first plating film layer includes approximately 0 wt. % to 1 wt. % of Bi relative to Sn.  
 
     
     
         11 . The manufacturing method for a semiconductor device according to  claim 10 , wherein 
 approximately 0 wt. % to 0.5 wt. % of Bi relative to Sn is included in the first plating film.    
     
     
         12 . The manufacturing method for a semiconductor device 
 according to  claim 10 , wherein    a lead frame is prepared, on which at least a semiconductor chip is sealed in a plurality of package, and the plating film layer is formed on the lead, which is exposed from the package.    
     
     
         13 . A manufacturing method for a semiconductor device, wherein a lead having a main material of Cu or Fe—Ni is prepared, wherein a semiconductor chip is electrically connected to the lead, wherein the semiconductor chip is sealed in a mold so that a portion of the lead is exposed from the mold, wherein the portion of the lead is bent or the semiconductor chip is electrically measured via the lead, wherein 
 a first plating film layer having a main metal material of Sn, and approximately 0 wt. % to 1 wt. % of Bi relative to Sn is included, is formed on a surface of the lead and a plating film layer having a main metal material of Sn—Bi is formed on a outermost surface of the lead.  
 
     
     
         14 . The manufacturing method for a semiconductor device according to  claim 13 , wherein 
 the lead is prepared after carrying out a plating process.    
     
     
         15 . The manufacturing method for a semiconductor device according to  claim 13 , wherein 
 a plating process is carried out on the lead, which is exposed from the mold, after the lead is sealed in the mold.    
     
     
         16 . A manufacturing method for a semiconductor device, wherein 
 a first plating film layer having a main metal material of Sn is formed by exposing from a package where semiconductor chip is sealed, wherein a lead on which a plating film layer having a main metal material of Sn—Bi on the outermost surface, is secured on desired conductive pattern, wherein    the first plating film layer includes approximately 0 wt. % to 1 wt. % of Bi relative to Sn.    
     
     
         17 . The manufacturing method for a semiconductor device according to  claim 16 , wherein 
 approximately 0 wt. % to 0.5 wt. % of Bi relative to Sn is included.

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