Semiconductor device with interconnection structure for reducing stress migration

Abstract

The semiconductor device of the present invention includes a first interconnection, a via-plug that is connected to the first interconnection, and a second interconnection that is formed as a single unit with the via-plug. The cross-sectional shape of the via-plug is such that the plug sidewall angle, which indicates the angle of the via-plug sidewall with respect to the surface of the first interconnection, is a positive angle; and moreover, at least two points exist between the base and the top of the via-plug on at least one sidewall of the two sidewalls of the cross-sectional shape of the via-plug at which the plug sidewall angle attains a maximum value. Since shapes that would give rise to the occurrence of concentrations of stress are not formed in the via-plug sidewalls, metal is more effectively embedded in the via-hole, and the incidence of voids is prevented.

What is claimed is:  
     
         1 . A semiconductor device having a first interconnection, a via-plug that is connected to said first interconnection, and a second interconnection that is formed as a single unit with said via-plug; wherein: 
 regarding a plug sidewall angle in a cross-sectional shape of said via-plug, said plug sidewall angle being an angle formed between: a line that joins an arbitrary point of a sidewall of said via-plug and a point of intersection between a line that passes through said arbitrary point and that is parallel to a surface of said first interconnection and a central axis of said via-plug, and a line that joins said arbitrary point and a point of intersection between a tangent line at said arbitrary point and said central axis, an angle of depression from a line that is parallel to the surface of said first interconnection is a positive angle, and an angle of elevation from a line that is parallel to the surface of said first interconnection is a negative angle; and    in the cross-sectional shape of said via-plug, said plug sidewall angle is a positive angle; and there are at least two points between a base and a top of said via-plug on at least one of two sidewalls of said via-plug cross-sectional shape at which said plug sidewall angle attains a maximum value.    
     
     
         2 . The semiconductor device according to  claim 1 , wherein said plug sidewall angle at arbitrary points of the sidewalls of said via-plug is a positive angle.  
     
     
         3 . The semiconductor device according to  claim 1 , wherein said plug sidewall angle is equal to or less than 900.  
     
     
         4 . The semiconductor device according to  claim 1 , wherein said plug sidewall angle is a continuous value between said two points of maximum value.  
     
     
         5 . The semiconductor device according to  claim 1 , wherein said plug sidewall angle at an arbitrary point, said arbitrary point being between a point on the sidewall of said via-plug at which said plug sidewall angle becomes a minimum value between said two maximum values and the base of said via-plug, is less than 90°.  
     
     
         6 . The semiconductor device according to  claim 1 , comprising a metal diffusion prevention film that is formed on said first interconnection; 
 wherein said plug sidewall angle at arbitrary points of the sidewall of said via-plug at a portion of said metal diffusion prevention film is an angle less than 90°.    
     
     
         7 . A fabrication method of a semiconductor device, said semiconductor device having a first interconnection, a via-plug that is connected to said first interconnection, and a second interconnection that is connected to said via-plug; said fabrication method comprising the steps of: 
 successively forming on said first interconnection: a first metal diffusion prevention film, an interlayer dielectric film, an etching stopper film, and an intralayer dielectric film;    using a lithographic process and an etching process to form a first opening in a prescribed opening pattern in said interlayer dielectric film, said etching stopper film, and said intralayer dielectric film;    applying an antireflective coating for preventing a reflection of light by said first interconnection, and forming a second opening in said first opening in which said antireflective coating is buried such that a position of an upper surface of said antireflective coating is lower than a lower surface of said etching stopper film;    forming a resist film having a prescribed pattern of trench openings in said intralayer dielectric film;    performing etching with said resist film as a mask to form a trench opening in said intralayer dielectric film, and forming sidewalls of said interlayer dielectric film of said second opening such that a diameter of said second opening is progressively larger from a bottom toward a top of said second opening;    removing said resist film and said antireflective coating;    etching from the trench opening that has been formed in said intralayer dielectric film to remove said etching stopper film and said first metal diffusion prevention film that have been exposed on upper surfaces and forming a via-hole that includes said second opening and the trench opening of said second interconnection; and    embedding a metal in said via-hole and the trench opening of said second interconnection to form said via-plug and said second interconnection, and then forming a second metal diffusion prevention film.    
     
     
         8 . The fabrication method of a semiconductor device according to  claim 7 , wherein: 
 regarding a plug sidewall angle in a cross-sectional shape of said via-hole following formation of said via-hole, said plug sidewall angle being an angle formed between: a line that joins an arbitrary point of a sidewall of said via-hole and a point of intersection of a line that passes through said arbitrary point and that is parallel to a surface of said first interconnection and a central axis of said via-hole, and a line that joins said arbitrary point and a point of intersection between a tangent line at said arbitrary point and said central axis, an angle of depression from a line that is parallel to the surface of said first interconnection is a positive angle, and an angle of elevation from a line that is parallel to the surface of said first interconnection is a negative angle; and    in the cross-sectional shape of said via-hole, said plug sidewall angle is a positive angle; and at least two points exist between a base and a top of said via-hole on at least one of two sidewalls of said via-hole cross-sectional shape at which said plug sidewall angle attains a maximum value.