Low power dynamic logic gate with full voltage swing operation

Abstract

Dynamic low-power logic using recycled energy is disclosed. Logic circuits have a discharge path, a precharge path and a control circuit. The precharge path is a PMOS transistor coupled between the clock line and the output node of the circuit and configured to charge the output node to the logic high voltage of the clock line during a precharge phase. During an evaluation phase, the discharge path computes the desired logic function at the output node. A control circuit is connected between the output node and the clock line and to the gate of the precharge path transistor. The control circuit provides the proper gate drive, regardless of the voltage on the output node or the inputs to the discharge path, to guarantee that the precharge transistor fully charges the output node to the logic high voltage of the clock line, which provides recycled energy for operating the circuit.

What is claimed is:  
     
         1 . A logic circuit for operating with a periodic input, comprising: 
 first and second transistors, each having a gate, and a source and drain with a channel therebetween, the gates of the first and second transistors for receiving logic inputs, the first and second transistors being coupled between the periodic input and an output node and configured to perform a logic function on the logic inputs;    a third transistor having a gate, and a source and drain with a channel therebetween, the channel coupled between the periodic input and the output node; and    a pair of complementary diode-connected transistors, each having a source and a drain and a channel defined therebetween, the sources of the transistors being connected to the output node and the drains being connected to the gate of the third transistor.