US2005032203A1PendingUtilityA1

Custom electrodes for molecular memory and logic devices

Priority: Apr 2, 2003Filed: Aug 30, 2004Published: Feb 10, 2005
Est. expiryApr 2, 2023(expired)· nominal 20-yr term from priority
G11C 13/02
35
PatentIndex Score
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Cited by
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Claims

Abstract

A method is provided for fabricating molecular electronic devices comprising at least a bottom electrode and a molecular switch film on the bottom electrode. The method includes forming the bottom electrode by a process including: cleaning portions of the substrate where the bottom electrode is to be deposited; pre-sputtering the portions; depositing a conductive layer on at least the portions; and cleaning the top surface of the conductive layer. Advantageously, the conductive electrode properties include: low or controlled oxide formation (or possibly passivated), high melting point, high bulk modulus, and low diffusion. Smooth deposited film surfaces are compatible with Langmuir-Blodgett molecular film deposition. Tailored surfaces are further useful for SAM deposition. The metallic nature gives high conductivity connection to molecules. Barrier layers may be added to the device stack, i.e., Al 2 O 3 over the conductive layer.

Claims

exact text as granted — not AI-modified
1 - 51 . (canceled)  
     
     
         52 . A conductive layer having a surface roughness of less than 8 Å RMS.  
     
     
         53 . A conductive layer formed on a substrate and having a surface roughness essentially the same as that of said substrate.  
     
     
         54 . The conductive layer of  claim 52  having a thickness of about 500 to 5,000 Å.  
     
     
         55 . The conductive layer of  claim 54  having a thickness of about 1,000 Å.  
     
     
         56 . The conductive layer of  claim 52 , wherein said conductive layer is supported on a substrate.  
     
     
         57 . The conductive layer of  claim 56  wherein said substrate comprises a material selected from the group consisting of silicon and insulating materials other than silicon.  
     
     
         58 . The conductive layer of  claim 57  wherein said substrate comprises silicon, and an oxide or nitride layer thereon, said conductive layer on said oxide or nitride layer.  
     
     
         59 . The conductive layer of  claim 57  wherein said substrate comprises mica, said conductive layer on said mica substrate.  
     
     
         60 . The conductive layer of  claim 52  wherein said conductive layer is either hydrophobic or hydrophilic.  
     
     
         61 . The conductive layer of  claim 52  wherein said surface roughness is less than 4 Å RMS.  
     
     
         62 . The conductive layer of  claim 53  wherein said surface roughness is of less than 8 Å RMS.  
     
     
         63 . The conductive layer of  claim 62  wherein said surface roughness is less than 4 Å RMS.  
     
     
         64 . The conductive layer of  claim 53  having a thickness of about 500 to 5,000 Å.  
     
     
         65 . The conductive layer of  claim 64  having a thickness of about 1,000 Å.  
     
     
         66 . The conductive layer of  claim 62 , wherein said conductive layer is supported on a substrate.  
     
     
         67 . The conductive layer of  claim 66  wherein said substrate comprises a material selected from the group consisting of silicon and insulating materials other than silicon.  
     
     
         68 . The conductive layer of  claim 67  wherein said substrate comprises silicon, and an oxide or nitride layer thereon, said conductive layer on said oxide or nitride layer.  
     
     
         69 . The conductive layer of  claim 67  wherein said substrate comprises mica, said conductive layer on said mica substrate.  
     
     
         70 . The conductive layer of  claim 53  wherein said conductive layer is either hydrophobic or hydrophilic.

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