Method for forming a semiconductor device, and a semiconductor device formed by the method

Abstract

A method for forming a multi-layer semiconductor device ( 1 ) having a lower silicon layer ( 4 ), an intermediate silicon layer ( 5 ) within which micro-mirrors ( 10 ) are formed and an upper spacer layer ( 6 ) of silicon for spacing another component from the micro-mirrors ( 10 ). First and second etch stop layers ( 8, 9 ) of oxide act as insulation between the respective layers ( 4, 5, 6 ). In order to minimise damage to the micro-mirrors ( 10 ), the formation of the micro-mirrors ( 10 ) is left to the end of the forming process. An assembly of the lower layer ( 4 ) and the intermediate layer ( 5 ) with the fist etch stop layer ( 8 ) is formed, and the second etch stop layer ( 9 ) is than grown and patterned on the intermediate layer ( 5 ) for subsequent formation of the micro-mirrors ( 10 ). The upper layer ( 5 ) is then bonded by an annealing process to the is patterned second etch stop layer ( 9 ). After the formation of communicating bores ( 30 ) in the lower layer ( 4 ) and thinning of the fist etch stop layer ( 8 ) adjacent the micro-mirrors ( 10 ) through the communicating bores ( 30 ), openings ( 16 ) in the upper layer ( 6 ) and the micro-mirrors ( 10 ) are sequentially formed by reactive ion etching through the upper layer ( 6 ). Portions of the first and second etch stop layers ( 8, 9 ) adjacent the micro-mirrors ( 10 ) am then etched away.

1 - 39 . (Cancelled).  
   
   
       40 . A semiconductor device comprising: 
 first, second and third layers    a component formed in the second layer, and    first and second etch stop layers located between the first and second layers, and the second and third layers, respectively, at least the second etch stop layer being bonded to one of the second and third layers, wherein    prior to bonding the second etch stop layer to the one of the second and third layers, the second etch stop layer is patterned to define the component in the second layer for facilitating etching of the second layer through the third layer and the second etch stop layer, and the second layer is etched subsequent to the second etch stop layer having been bonded to the one of the first and second layers.    
   
   
       41 . A semiconductor device as claimed in  claim 40  in which a portion of the third layer adjacent the component is etched for forming and opening through the third layer exposing the component.  
   
   
       42 . A semiconductor device as claimed in  claim 40  in which a portion of the second etch stop layer adjacent the component is etched for removing the second etch stop layer from the component.  
   
   
       43 . A semiconductor device as claimed in  claim 40  in which a portion of the first etch stop layer adjacent the component is etched for removing the first etch stop layer from the component and for forming a void between the component and the first layer.  
   
   
       44 . A semiconductor device as claimed in  claim 43  in which the first etch stop layer is etched through a communicating bore formed through the first layer communicating with the first etch stop layer  
   
   
       45 . A semiconductor device as claimed in  claim 40  in which the first and second etch stop layers are oxide layers.  
   
   
       46 . A semiconductor device as claimed in  claim 40  in which the first, second and third layers are layers of semiconductor material.  
   
   
       47 . A semiconductor device as claimed in  claim 40  in which the first, second and third layers are of silicon material.  
   
   
       48 . A semiconductor device as claimed in  claim 40  in which the component is a micro-mechanical component.  
   
   
       49 . A semiconductor device as claimed in  claim 40  in which the component is a micro-optical component.