Polysilicon thin film transistor device and method of fabricating the same

Abstract

A polysilicon thin film transistor device includes a gate metal pattern including a gate electrode and a gate line formed on a substrate, the gate metal pattern having a stepped portion, a gate insulating film formed on the gate metal pattern, a polysilicon semiconductor layer formed on the gate insulating film, the polysilicon semiconductor layer including an active region, lightly doped drain regions, a source region, and a drain region, a source electrode connected to the source region and a drain electrode connected to the drain region on the polysilicon semiconductor layer, and a pixel electrode connected with the drain electrode.

1 . A polysilicon thin film transistor device, comprising: 
 a gate metal pattern including a gate electrode and a gate line formed on a substrate, the gate metal pattern having a stepped portion;    a gate insulating film formed on the gate metal pattern;    a polysilicon semiconductor layer formed on the gate insulating film, the polysilicon semiconductor layer including an active region, lightly doped drain regions, a source region, and a drain region;    a source electrode connected to the source region and a drain electrode connected to the drain region on the polysilicon semiconductor layer; and    a pixel electrode connected with the drain electrode.    
     
     
         2 . The device according to  claim 1 , wherein a thickness of the gate electrode is less than a thickness of the gate line.  
     
     
         3 . The device according to  claim 1 , wherein the gate electrode and the gate line are formed of the same material on the same plane.  
     
     
         4 . The device according to  claim 1 , wherein the stepped portion of the gate metal pattern is formed by photolithographic processes using a diffraction mask.  
     
     
         5 . A method of fabricating a polysilicon thin film transistor device, comprising: 
 forming a gate metal pattern having a stepped portion on a substrate;    forming a gate insulating film on the gate metal pattern;    forming a polysilicon semiconductor layer on the gate insulating film;    forming an active region, lightly doped drain regions, a source region, and a drain region on the polysilicon semiconductor layer by implanting impurities;    forming a source electrode electrically connected to the source region and forming a drain electrode electrically connected to the drain region; and    forming a pixel electrode connected to the drain electrode.    
     
     
         6 . The method according to  claim 5 , further comprising forming an interlayer insulating layer having a contact hole for connecting the source region to the source electrode and for connecting the drain region to the drain electrode, after the forming a polysilicon semiconductor layer.  
     
     
         7 . The method according to  claim 5 , wherein the gate metal pattern comprises a gate electrode and a gate line.  
     
     
         8 . The method according to  claim 7 , wherein the gate electrode has a thickness less than a thickness of the gate line.  
     
     
         9 . The method according to  claim 5 , wherein the forming the gate metal pattern comprises: 
 depositing a gate metal material on the substrate;    coating a photoresist film on the gate metal material;    forming a photoresist film pattern having a stepped portion by diffraction-exposing the coated photoresist film;    patterning a gate electrode and a gate line by a first etching of the gate metal material;    performing a second etching of the gate electrode by etching the photoresist film pattern; and    removing the photoresist film pattern.    
     
     
         10 . The method according to  claim 9 , further comprising removing the photoresist disposed on the gate electrode by ash-treating the photoresist pattern having the stepped portion, after the patterning the gate electrode and the gate line  
     
     
         11 . A method of fabricating a polysilicon thin film transistor device, comprising: 
 forming a gate metal material on a substrate;    forming a photoresist film pattern having a stepped portion by coating a photoresist film on the gate metal material and diffraction-exposing the coated photoresist film;    patterning a gate electrode and a gate line by a first etching of the gate metal material exposed by the photoresist film pattern;    performing a second etching of the gate electrode such that the gate electrode and the gate line have a thickness difference;    forming a gate insulating film on the gate metal pattern;    forming a polysilicon layer on the gate insulating film;    forming a source electrode electrically connected to a source region of the polysilicon layer and forming a drain electrode electrically connected to a drain region on the polysilicon layer; and    forming a pixel electrode connected to the drain electrode.    
     
     
         12 . The method according to  claim 11 , further comprising, removing the photoresist disposed on the gate electrode by ash-treating the photoresist pattern having the stepped portion, after the patterning the gate electrode and the gate line