US2005082373A1PendingUtilityA1

Intergrated circuit architecture for smart card and related storage allocating method

34
Priority: Nov 19, 2001Filed: Nov 15, 2002Published: Apr 21, 2005
Est. expiryNov 19, 2021(expired)· nominal 20-yr term from priority
G06F 12/023
34
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The invention concerns an integrated circuit, particularly for a smart card, including a central unit ( 1 ), a non-volatile memory ( 9 ) capable of containing the machine code and data, and a memory control unit ( 8 ). The integrated circuit is characterized in that the memory control unit includes programmable allocation means ( 10 ) for allocating first ( 9 a ) and second ( 9 b ) spaces of the non volatile memory defined for containing, respectively, the machine code and the data.

Claims

exact text as granted — not AI-modified
1 . (canceled)  
     
     
         2 . (canceled)  
     
     
         3 . (canceled)  
     
     
         4 . (canceled)  
     
     
         5 . (canceled)  
     
     
         6 . (canceled)  
     
     
         7 . (canceled)  
     
     
         8 . (canceled)  
     
     
         9 . (canceled)  
     
     
         10 . (canceled)  
     
     
         11 . An integrated circuit, particularly for a smart card, including a central unit, a non volatile memory capable of containing machine code and data, and a memory control unit, wherein said memory control unit includes programmable allocation means for allocating at least a defined first and second spaces of said non volatile memory defined for containing, respectively, said machine code and said data.  
     
     
         12 . The integrated circuit according to  claim 11 , wherein said programmable allocation means allow said first and second spaces of said non volatile memory to be allocated dynamically in response to a dynamic definition of said first and second spaces for containing said machine code and said data.  
     
     
         13 . The integrated circuit according to  claim 11 , wherein said non volatile memory can be broken down into a determined number of memory blocks of the same size defining a nominal granularity for said memory.  
     
     
         14 . The integrated circuit-according to  claim 12 , wherein said non volatile memory can be broken down into a determined number of memory blocks of the same size defining a nominal granularity for said memory.  
     
     
         15 . The integrated circuit according to  claim 13 , wherein said programmable means further enable different granularities to be defined, which are multiples of said nominal granularity, according to said first and second memory spaces of said memory.  
     
     
         16 . The integrated circuit according to  claim 14 , wherein said programmable means further enable different granularities to be defined, which are multiples of said nominal granularity, according to said first and second memory spaces of said memory.  
     
     
         17 . An allocation method for a non volatile memory of an integrated circuit, particularly for a smart card, including a central unit, a non volatile memory capable of containing machine code and data, and a memory control unit, wherein said memory control unit includes programmable allocation means for allocating at least a defined first and second spaces of said non volatile memory defined for containing, respectively, said machine code and said data, wherein the method includes the steps of: 
 a. defining first and second memory spaces for containing, respectively, the code and the data, or conversely, each having a determined memory size;    b. delimiting at least one reserved memory zone having a size greater than or equal to the determined memory size of said first memory space; and    c. allocating said first and second memory spaces, respectively inside and outside the reserved memory zone.    
     
     
         18 . The allocation method according to  claim 17 , wherein step (b) further comprises: 
 defining two memory points delimiting the reserved memory zone having a size greater than or equal to the determined size of said first memory space defined in step (a).    
     
     
         19 . The allocation method according to  claim 17 , wherein step (b) further comprises: 
 defining a border point cutting the non volatile memory into two delimiting first and second reserved memory zones each having a size greater than or equal to, respectively, the determined sizes of said first and second memory spaces defined in step (a); and    wherein step (c) further comprises: 
 allocating said first and second memory spaces inside, respectively, said first and second reserved memory zones.  
   
     
     
         20 . The allocation method according to  claim 17 , further including an additional step of: 
 d—allocating at least a third additional memory space for containing said machine code or data, in an unallocated zone of said at least one reserved memory zone.    
     
     
         21 . The allocation method according to  claim 17 , said non volatile memory having a determined nominal granularity, and further including the additional step of: 
 e—defining a specific granularity that is a multiple of said nominal granularity for each allocated memory space.    
     
     
         22 . The allocation method according to  claim 17 , said programmable allocation means enabling a dynamic allocation, and further including a preliminary step of: dynamically determining the memory size necessary to contain said machine code and the data.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.