Manufacturing method of semiconductor-on-insulator region structures

Abstract

A single-crystal silicon region on insulator on silicon intended to receive at least one component, the insulator having overthicknesses.

1 . A method for manufacturing a semiconductor region on insulator on silicon, comprising: 
 forming in single-crystal silicon a heavily-doped N-type buried layer of uniform thickness;    forming at least one heavily-doped N-type vertical region extending from the upper surface of the silicon at least to the buried layer;    forming, under and in contact with the buried layer, at least one heavily-doped N-type region; and    selectively oxidizing the heavily-doped N-type regions and buried layer.    
     
     
         2 . The method of  claim 1 , wherein the dopant concentration of the N-type regions and of the buried layer is higher than 10 17  at/cm 3 .  
     
     
         3 . A method for manufacturing a MOS transistor, comprising: 
 forming in single-crystal silicon a heavily-doped N-type buried layer of uniform thickness;    forming an insulated gate;    forming two vertical heavily-doped N-type regions extending from the upper surface of the silicon at least to the buried layer, the vertical regions being formed on either side of the gate and intact portions of the silicon being maintained between the gate and each of the vertical regions;    forming, under and in contact with the buried layer, two separate heavily-doped N-type regions which do not extend perpendicular to the gate; and    selectively oxidizing all the heavily-doped N-type areas.    
     
     
         4 . The method of  claim 3 , wherein the dopant concentration of the N-type regions and of the buried layer is higher than 10 17  at/cm 3 .