Page granular curtained memory via mapping control

Abstract

Methods of providing and limiting access to trusted memory are provided. Trusted memory pages are not mapped with page map pages. When a central processor is operated in a page-mapping mode, access to the trusted memory is limited. In particular, without mapping information, software and hardware modules cannot access and modify the contents of trusted memory sections.

1 . A method of restricting access to memory, the method comprising: 
 storing data in a memory location;    determining whether the data is trusted or non-trusted data;    if the data is non-trusted data, then mapping the memory location with at least one page map stored in a non-trusted memory section; and    if the data is trusted data, then mapping the memory location with said at least one page map that is stored in a trusted memory section, there being no page map that is stored in any non-trusted memory section that leads to said memory location when said memory location contains trusted data.    
   
   
       2 . The method of  claim 1 , further comprising: 
 configuring a processor that controls access to the at least one page map page to run in a page-mapping mode.    
   
   
       3 . The method of  claim 2 , further comprising: 
 declaring a security violation when the processor changes from the page-mapping mode.    
   
   
       4 . The method of  claim 2 , further comprising: 
 declaring a security violation when the processor changes to another page-mapping mode.    
   
   
       5 . The method of  claim 1 , further comprising: 
 configuring a processor that controls access to the at least one page map page to run in a segment-mapping mode.    
   
   
       6 . The method of  claim 5 , further comprising: 
 declaring a security violation when the processor changes from the segment-mapping mode.    
   
   
       7 - 9 . (canceled)  
   
   
       10 . The method of  claim 1  wherein the data is trusted data stored in a physical memory page and further comprising: 
 identifying the physical memory page as trusted memory in a trusted page vector; and    preventing a direct memory access device from accessing any page that is identified in said trusted page vector as being a trusted page.    
   
   
       11 . A computer-readable medium contain computer-executable instructions for causing a computer device to perform the steps comprising: 
 storing data in a memory location;    determining whether the data is trusted or non-trusted data;    if the data is non-trusted data, then mapping the memory location with at least one page map page stored in a non-trusted memory section; and    if the data is trusted data, then mapping the memory location with said at least one page map that is stored in a trusted memory section, there being no page map that is stored in any non-trusted memory section that leads to said memory location when said memory location contains trusted data.    
   
   
       12 . The computer-readable medium of  claim 11 , further including computer-executable instructions for causing the computer device to perform the step comprising: 
 configuring a processor that controls access to the at least one page map page to run in a page-mapping mode.    
   
   
       13 . The computer-readable medium of  claim 12 , further including computer-executable instructions for causing the computer device to perform the step comprising: 
 declaring a security violation when the processor changes from the page-mapping mode.    
   
   
       14 . The computer-readable medium of  claim 12 , further including computer-executable instructions for causing the computer device to perform the step comprising: 
 declaring a security violation when the processor changes to another page-mapping mode.    
   
   
       15 - 16 . (canceled)  
   
   
       17 . The computer-readable medium of  claim 12 , further including computer-executable instructions for causing the computer device to perform the step comprising: 
 identifying the physical memory page as trusted memory in a trusted page vector when the data is trusted data; and    preventing a direct memory access device from accessing any page that is identified in said trusted page vector as being a trusted page.    
   
   
       18 . A device for restricting direct memory access to a first memory, the device coupled to a central processing unit and comprising: 
 a second memory containing a direct memory access exclusion vector containing access values that identify physical memory pages that do not allow direct memory access;    a restriction module coupled to the central processing unit, the first memory and the second memory, the restriction module configured to perform the steps comprising:    receiving an identification of a physical memory page in the first memory;    comparing the identification to an access value for the physical memory page in the direct memory access exclusion vector; and    allowing direct memory access to the physical memory page, by a direct memory access device that accesses memory using a physical address and without using a virtual address, only when the access value allows direct memory access.    
   
   
       19 . The device of  claim 18 , wherein the first memory and the second memory are implemented in the same memory module.  
   
   
       20 . The device of  claim 19 , wherein the identification of the physical memory page is received from a peripheral device having bus master access.  
   
   
       21 . The device of  claim 18 , further including: 
 a third memory that contains at least one page map page mapping only physical memory pages that are identified as non-trusted.    
   
   
       22 . A computer device configured to limit access to memory, the computer device comprising: 
 a central processor unit configured to operate in a trusted mode and a non-trusted mode;    a first memory portion containing memory pages; and    a second memory portion containing at least one non-trusted page map page that only maps the physical memory pages that are identified as non-trusted, there being a set of pages that are designated for the storage of trusted data, and there not being any page map stored in memory pages that are not designated for the storage of trusted data that leads to said pages that are designated for the storage of trusted data.    
   
   
       23 . The computer device of  claim 20 , wherein the central processor unit is operated in a page-mapping mode.  
   
   
       24 . The method of  claim 1 , wherein there are a plurality of page maps and a register that identifies one of the plurality of page maps as being the page map that is currently used to translate virtual addresses by said register's containing the address of the page directly of said one of said plurality of page maps, there being a root page vector that identifies address of page directories for one or more page maps that are allowed to be used for translation of virtual addresses, and wherein the method further comprises: 
 if an attempt is made to load an address into said register that is not identified in said root page vector as being the address of a page directory for a page map that is allowed to be used for translation of addresses, then performing at least one of: 
 causing a new page map to be evaluated;  
 taking an action that leads to said new page map being evaluated; and  
 preventing the attempted address from being loaded into said register.  
   
   
   
       25 . The method of  claim 1 , wherein said page map comprises one or more page tables and a page directory that points to said one or more page tables, and wherein the method further comprises: 
 evaluating an attempt to edit said page directory to ensure that any change effected by the editing of said page directory will not result in a valid, present link to a page table that would result in violation of a barrier between trusted and non-trusted data.    
   
   
       26 . The computer-readable medium of  claim 11 , wherein there are a plurality of page maps and a register that identifies one of the plurality of page maps as being the page map that is currently used to translate virtual addresses by said register's containing the address of the page directly of said one of said plurality of page maps, there being a root page vector that identifies address of page directories for one or more page maps that are allowed to be used for translation of virtual addresses, and wherein the steps further comprise: 
 if an attempt is made to load an address into said register that is not identified in said root page vector as being the address of a page directory for a page map that is allowed to be used for translation of addresses, then performing at least one of: 
 causing a new page map to be evaluated;  
 taking an action that leads to said new page map being evaluated; and  
 preventing the attempted address from being loaded into said register.  
   
   
   
       27 . The computer-readable medium of  claim 11 , wherein said page map comprises one or more page tables and a page directory that points to said one or more page tables, and wherein the steps further comprise: 
 evaluating an attempt to edit said page directory to ensure that any change effected by the editing of said page directory will not result in a valid, present link to a page table that would result in violation of a barrier between trusted and non-trusted data.