Capacitor structure having hemispherical grains

Abstract

A first insulating layer is formed on semiconductor substrate, and a trench is formed in the first insulating layer. An amorphous silicon layer doped with impurities is formed on a side and bottom walls of the trench. Next, a resist material is partially filled in the trench so that an upper portion of the amorphous silicon layer is exposed. The exposed portion is implanted with impurity ions. After removal of the resist material, the amorphous silicon layer is heat treated so as to grow hemispherical grains on its surface.

1 . A capacitor of a memory cell formed on a silicon substrate, said capacitor comprising: 
 a first electrode and second electrode, said first electrode disposing opposite to said second electrode and adjacent to the neighboring capacitor;    said first electrode having HSG roughness grown from amorphous silicon on its surface, the HSG roughness of the top portion of said first electrode being smaller than the other portions of said first electrode.    
   
   
       2 . The capacitor of the  claim 1 , wherein said first electrode disposes outside said capacitor and said second electrode disposes inside said capacitor.  
   
   
       3 . The capacitor of the  claim 1 , wherein said first electrode is made from amorphouse silicon.  
   
   
       4 . The capacitor of the  claim 3 , wherein impurity concentration at the top portion of said first electrode is higher than that at the other portion of said first electrode.  
   
   
       5 . The capacitor of the  claim 4 , wherein said impurity is either phosphorous or arsenic.  
   
   
       6 . The capacitor of the  claim 4 , wherein impurity concentration at the top portion of said first electrode is more than eE20 cm −3 .  
   
   
       7 - 10 . (canceled)