Method for Pulse Modulation Control of Switching Regulators

Abstract

A method for pulse modulation control of switching regulators includes positioning a series of parallel FET-type switches (high-side switches) between the input side of an inductor and the voltage supply. A second parallel series of FET-type switches (low-side switches) are used to connect the input side of the inductor to ground. A control module enables one or more of the high-side switches at the start of each switching cycle. The enabled high side switches remain enabled until the output of the buck-type switching regulator is within regulation or a current limit through the high-side switches has been exceeded. The control module then disables all high-side switches and enables an equivalent number of low-side switches. The low-side switches remain enabled until the output has fallen below regulation or current has ceased to flow from the inductor to the load of the regulator.

1 . A method for pulse modulation control of a switching regulator where the switching regulator include a parallel series of m high side switches and a parallel series of m low side switches, the method comprising: 
 a) closing n high side switches within the parallel series of m high side switches where n is less than or equal to m;    b) opening each high side switch closed in step a;    c) closing n low side switches within the parallel series of m low side switches;    d) opening each low side switch closed in step c; and    e) repeating steps a though e while varying the number n to maintain the output of the regulator at a desired voltage or current level.    
   
   
       2 . A method as recited in  claim 1  where the switching regulator is selected from a group consisting of buck, boost and buck boost types.  
   
   
       3 . A method as recited in  claim 1  which further comprises the step of opening all low side switches when a reverse current condition is detected within the switching regulator.  
   
   
       4 . A method as recited in  claim 1  where the step of closing the high side switches is performed synchronously with a system clock and where the step of opening the high side switches is timed to occur no more than a predetermined number of cycles later.  
   
   
       5 . A method as recited in  claim 4  where the steps of closing and opening the high side switches is controlled to avoid a predetermined switching frequency.  
   
   
       6 . A pulse modulation controller for a switching regulator, the controller comprising: 
 a parallel series of m high side switches;    a parallel series of m low side switches;    a controller configured to:    a) close n high side switches within the parallel series of m high side switches where n is less than or equal to m;    b) open each high side switch closed in step a;    c) close n low side switches within the parallel series of m low side switches;    d) open each low side switch closed in step c; and    e) repeat steps a though e while varying the number n to maintain the output of the regulator at a desired voltage or current level.    
   
   
       7 . A pulse modulation controller as recited in  claim 6  where the switching regulator is selected from a group consisting of buck, boost and buck boost types.  
   
   
       8 . A pulse modulation controller as recited in  claim 6  where the controller is configured to opening all low side switches when a reverse current condition is detected within the switching regulator.  
   
   
       9 . A pulse modulation controller as recited in  claim 6  where the controller is configured to: 
 close the high side switches synchronously with a system clock; and    open the high side switches no more than a predetermined number of cycles later.    
   
   
       10 . A pulse modulation controller as recited in  claim 9  where controller selectively skips one or more switching frequency bands when controlling the opening and closing of the high side switches.