Sampling frequency conversion apparatus

Abstract

A sampling frequency conversion apparatus which easily controls the phase difference (time difference) between the input data and the output data in converting the sampling frequency, and comprises storage means 13 for continuously writing the input data or the data obtained by over-sampling the input data and for continuously reading out the data written maintaining a predetermined address difference relative to the write address, and interpolation processing means 14 for interpolating the data read out from the storage means 13 to obtain data of which the sampling frequency is converted. In converting the sampling frequency, an address difference between a write address and a read address in the storage means 13 is optimized, the address difference being optimized without limitation for a predetermined period of time from the start of supplying the input data and, then, being optimized by imposing a predetermined limitation after the passage of the predetermined period of time.

1 . A sampling frequency conversion apparatus for converting input data of a first sampling frequency into output data of a second sampling frequency, the apparatus comprising: 
 storage means into which said input data are continuously written and from which said input data are read-out;    interpolation processing means for interpolating the data read-out from said storage means to obtain data of said second sampling frequency;    address difference detecting means for detecting an address difference between a writable address and a readable address in said storage means; and    address control means for performing an optimization operation optimizing the address difference detected by said address difference detecting means, wherein    said address control means adaptively sets a limitation on the optimizing operation.    
   
   
       2 - 4 . (canceled)  
   
   
       5 . The sampling frequency conversion apparatus according to  claim 1 , wherein 
 said address control means se works so as not to execute said optimization operation when the address difference detected by said address difference detecting means falls within a predetermined range after passage of a predetermined period of time from a time when the input data is initially supplied.    
   
   
       6 . The sampling frequency conversion apparatus according to  claim 1 , wherein 
 said address control means performs a control operation to bring said address difference close to a predetermined optimum value not imposing the limitation when a predetermined period of time has not been passed after a start of supplying said input data or when the address difference detected by said address difference detector means falls outside of a predetermined range.    
   
   
       7 - 11 . (canceled)