Semiconductor integrated circuit device

Abstract

A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has a first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed, wherein the second circuit block has an input unit which receives signals supplied from the first circuit block, and the input unit of the second circuit block has an input circuit which, in accordance with the control signal which was responded to when the second power supply state was instructed by the third circuit block to the first circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block.

1 . A semiconductor integrated circuit device comprising: 
 a first circuit block;    a second circuit block; and    a third circuit block,    wherein the first circuit block has a first power supply state in which the operation of internal circuits thereof is guaranteed in accordance with an instruction from the third circuit block and a second power supply state in which the operation of the internal circuits thereof is not guaranteed,    wherein the second circuit block has an input unit which receives signals supplied from the first circuit block, and    wherein the input unit of the second circuit block has an input circuit which, in accordance with a control signal which was responded to when the second power supply state was instructed by the third circuit block to the first circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the second circuit block irrespective of the signal supplied from the first circuit block.    
   
   
       2 . The semiconductor integrated circuit device according to  claim 1 , 
 wherein the second circuit block has a first power supply state in which the operation of internal circuits thereof is guaranteed in accordance with an instruction from the third circuit block and a second power supply state in which the operation of the internal circuits thereof is not guaranteed,    wherein the first circuit block has an input unit which receives signals supplied from the second circuit block, and    wherein the input unit of the first circuit block has an input circuit which, in accordance with the control signal which was responded to when the second power supply state was instructed by the third circuit block to the second circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the first circuit block irrespective of the signal supplied from the second circuit block.    
   
   
       3 . The semiconductor integrated circuit device according to  claim 2  further comprising: 
 a fourth circuit block having a first power supply state in which the operation of internal circuits thereof is guaranteed in accordance with an instruction from the third circuit block and a second power supply state in which the operation of the internal circuits thereof is not guaranteed,    wherein the first or second circuit block has an input unit which receives signals supplied from the fourth circuit block,    wherein the input unit of the first or second circuit block has an input circuit which, in accordance with the control signal which was responded to when the second power supply state was instructed by the third circuit block to the fourth circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the first or second circuit block irrespective of the signal supplied from the fourth circuit block,    wherein the fourth block has an input circuit which captures as it is a signal outputted from the first or second circuit block, and    wherein the third circuit block, when the first or second circuit block is to be placed in the second power supply state, also places the fourth circuit block in the second power supply state.    
   
   
       4 . The semiconductor integrated circuit device according to  claim 1 , 
 wherein the second power supply state is a power supply cut-off state.    
   
   
       5 . The semiconductor integrated circuit device according to  claim 1 , 
 wherein internal circuits operate in the second power supply state at a low voltage of or below the lower limit of the operating voltage.    
   
   
       6 . The semiconductor integrated circuit device according to  claim 4 , 
 wherein the first, second or fourth circuit block comprising:    first cells including first power supply lines comprising source voltage lines extending in parallel in a first direction and the ground wires of circuits, and first switch elements arranged in a layer including the semiconductor substrate of such first power supply lines and disposed between the source voltage lines or the ground wires of circuits and the matching power supply lines of the internal circuits;    second cells including second power supply lines comprising source voltage lines extending in parallel in a second direction orthogonal to the first direction and the ground wires of circuits;    third cells matching at least one corner of an element area in which the first, second or fourth circuit block is formed, and comprising corner power supply lines mutually connecting the source voltage lines of the first power supply lines and second power supply lines and the ground wires of circuits, and a power switch controller which is arranged in a lower layer including the semiconductor substrate of the corner power supply lines and controls the first switch elements of the first cells; and    fourth cells matching the remaining ones of the corners and provided with corner power supply lines mutually connecting the source voltage lines of the first power supply lines and second power supply lines and the ground wires of circuits,    wherein the first cells, second cells, third cells and fourth cells are provided in a plurality each matching the size of the first, second or fourth circuit block, the cells surrounding the internal circuits and making possible mutual connection of matching power supply lines.    
   
   
       7 . The semiconductor integrated circuit device according to  claim 6  further comprising: 
 fifth cells arranged matching the first direction in the lower layer including the first power supply lines and the semiconductor substrate of the first power supply lines, and including capacitance elements disposed over the source voltage lines and the ground wires of circuits; and    sixth cells arranged matching the second direction in the lower layer including the second power supply lines and the semiconductor substrate of the second power supply lines, and including capacitance elements disposed over the source voltage lines and the ground wires of circuits,    wherein the fifth cells are arranged alongside the first cells, and    wherein the fifth cells are arranged either alongside the second cells or replacing second cells.    
   
   
       8 . The semiconductor integrated circuit device according to  claim 7 , 
 wherein the input circuit is comprised of either a logical gate circuit or a latch circuit.    
   
   
       9 . The semiconductor integrated circuit device according to  claim 7 , 
 wherein the first, second or fourth circuit block comprises:    a combination of a first circuit formed of a MOSFET having a high threshold voltage, a second circuit formed of a MOSFET having a medium threshold voltage, and a third circuit formed of a MOSFET having a low threshold.    
   
   
       10 . The semiconductor integrated circuit device according to  claim 7 , 
 wherein the input unit disposed in the first, second or fourth circuit block includes a level converting circuit matching the level of signals to be propagated.    
   
   
       11 . The semiconductor integrated circuit device according to  claim 10 , 
 wherein the logical gate circuit or latch circuit constituting the input circuit is disposed at the output side of the level converting circuit.    
   
   
       12 . The semiconductor integrated circuit device according to  claim 3  further comprising: 
 a fifth block equivalent to the fourth circuit block, the fifth block having a first power supply state in which the operation of internal circuits thereof is guaranteed in accordance with an instruction from the third circuit block and a second power supply state in which the operation of the internal circuits thereof is not guaranteed,    wherein the first circuit block, second circuit block or fourth circuit block has an input unit which receives signals supplied from the fifth circuit block,    wherein the input unit of the first, second or fourth circuit block has an input circuit which, in accordance with the control signal which was responded to when the second power supply state was instructed by the third circuit block to the fifth circuit block, causes a specific signal level to be maintained in compliance with the operating voltage of the first, second or fourth circuit block irrespective of the signal supplied from the fifth circuit block, and    wherein the fifth block has an input circuit which captures as it is a signal outputted from the first, second or fourth circuit block.