High speed interface with looped bus

Abstract

A method and associated apparatus is provided for improving the performance of a high speed memory bus by substantially eliminating bus reflections caused by electrical stubs. The stubs are substantially eliminated by connecting system components in a substantially stubless configuration using a looping bus for continuing the looping bus through each device. The invention also provides an interface circuit that enables data communications between devices of different technologies. The interface circuit connects to the looping data bus and includes a circuit for providing voltage level, encoding type, and data rate conversions for data received from the looping data bus and intended for use on a second data bus connected to the interface circuit.

1 . A data transfer interface, comprising: 
 a first bus segment of a first data bus, said first data bus having a first number of data paths;    a second bus segment of said first data bus;    a second data bus having a second number of data paths;    an interface circuit connected between said first and second data buses, wherein said interface circuit is configured to selectively receive data on said first data bus and place said data on said second data bus, said interface circuit being connected to said first data bus between said first and second bus segments of said first data bus for passing data through from said first bus segment to said second bus segment and from said second bus segment to said first bus segment.    
   
   
       2 - 61 . (canceled)