Efficient current monitoring for DC-DC converters

Abstract

The present invention achieves technical advantages as a current monitoring circuit for DC-DC switching converters, including a track and latch comparator circuit ( 30 ) having a preamplifier ( 32 ) that is controlled independently of a latch circuit ( 34 ). Advantageously, the comparator is small and operates very fast and with improved sensitivity. For example, the preamplifier circuit is disabled when the latch stage is making its decision to avoid noise and input disturbances from affecting the latch stage. This selective disabling feature speeds up the signal processing of the comparator and allows it to work in parallel with other circuits. The latch stage can make its decision later, regardless of any further activity at the inputs of the comparator.

1 . A comparator adapted to provide over-current monitoring, comprising: 
 a preamplifier stage having a first input adapted to receive and track a current sensing parameter, a second input adapted to receive a reference current trip point threshold parameter, and generating an output tracking the current sensing parameter as a function of a first control signal; and    a latch stage receiving the output and adapted to be selectively enabled by a second control signal.    
   
   
       2 . The comparator as specified in  claim 1  wherein the latch stage is adapted to selectively latch the preamplifier stage output.  
   
   
       3 . The comparator as specified in  claim 2  wherein the latch stage has nearly an infinite gain when the latch stage is regenerating.  
   
   
       4 . The comparator as specified in  claim 1  wherein the preamplifier stage is adapted to be selectively disabled.  
   
   
       5 . The comparator as specified in  claim 4  wherein the preamplifier stage is adapted to be selectively disabled when the latch stage is enabled.  
   
   
       6 . The comparator as specified in  claim 4  wherein the preamplifier stage further comprises transistors adapted to be selectively enabled to source additional current when enabled.  
   
   
       7 . The comparator as specified in  claim 1  wherein the preamplifier further comprises transistors mirroring current to the latch stage.  
   
   
       8 . The comparator as specified in  claim 7  wherein the latch stage further includes receiving transistors coupled to the current mirroring transistors of the preamplifier stage.  
   
   
       9 . The comparator as specified in  claim 8  wherein the receiving transistors are pre-charged with current from the preamplifier stage.  
   
   
       10 . The comparator as specified in  claim 9  wherein the latch stage is a regenerative latch.  
   
   
       11 . A method of operating a current sensing comparator having a preamplifier and a latch responsively coupled to the preamplifier, comprising the steps of: 
 selectively disabling the latch independently of the preamplifier receiving and tracking a parameter indicative of a sensed current.    
   
   
       12 . The method as specified in  claim 11  further comprising the step of selectively disabling the preamplifier independently of the latch.  
   
   
       13 . The method as specified in  claim 11  further comprising the step of selectively pre-charging the latch prior to enabling the latch.  
   
   
       14 . The method as specified in  claim 11  further comprising the step of mirroring current of the preamplifier to the latch.  
   
   
       15 . The method as specified in  claim 14  wherein the latch has current receiving transistors coupled to the mirrored current.  
   
   
       16 . The method as specified in  claim 11  wherein the latch is a regenerative latch.  
   
   
       17 . The method as specified in  claim 11  wherein the latch is selectively disabled as a function of a blacking time interval.