Method of manufacturing a semiconductor device and a fabrication apparatus for a semiconductor device
Abstract
A method of manufacturing a semiconductor device able to reduce the number of manufacturing steps and attain the rationalization of a manufacturing line is disclosed. The semiconductor device is a high-frequency module assembled by mounting chip parts ( 22 ) and semiconductor pellets ( 21 ) onto each of wiring substrates ( 2 ) formed on a matrix substrate ( 27 ) after inspection. A defect mark ( 2 e ) is affixed to a wiring substrate ( 2 ) as a block judged to be defective in the inspection of the matrix substrate ( 27 ), then in a series of subsequent assembling steps the defect mark (e) is recognized and the assembling work for the wiring substrate ( 2 ) with the defect mark ( 2 e ) thereon is omitted to attain the rationalization of a manufacturing line.
Claims
exact text as granted — not AI-modified1 - 42 . (canceled)
43 . A method of manufacturing a power amplification module comprising the steps of:
(a) preparing a plurality of wiring substrates; (b) inspecting the wiring substrates; (c) affixing a defect mark to a defective wiring substrate out of the plurality of wiring substrates; and (d) mounting a chip for a passive element or a chip for an active element onto one of the wiring substrates on which the defect mark is not affixed.
44 . The method of manufacturing a power amplification module according to claim 44 , wherein the power amplification module is an RF power module.
45 . The method of manufacturing a power amplification module according to claim 44 , further comprising the step of:
between the steps (c) and (d), conducting a baking process.
46 . The method of manufacturing a power amplification module according to claim 43 , wherein the defect mark does not dissolve under a washing process.
47 . A method of manufacturing a power amplification module having a passive element and a semiconductor chip, comprising the steps of:
(a) preparing a wiring substrate having a first terminal and a second terminal; (b) printing a first solder material to the first terminal; (c) applying a second solder material by potting to the second terminal; (d) after the step (b), disposing the passive element over the first terminal; (e) after the step (c), disposing the semiconductor chip over the second terminal; and (f) after the steps (d) and (e), performing a reflow of the first and second solder materials.
48 . The method of manufacturing a power amplification module according to claim 47 , further comprising the step of:
(g) after the step (f), coating a resin over the semiconductor chip.
49 . The method of manufacturing a power amplification module according to claim 47 , wherein the semiconductor chip includes an amplification circuit.
50 . The method of manufacturing a power amplification module according to claim 47 , wherein the step (c) is performed after the step (b).Join the waitlist — get patent alerts
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