Microcomputer and dividing circuit

Abstract

Herein disclosed is a microcomputer MCU adopting the general purpose register method. The microcomputer is enabled to have a small program capacity or a high program memory using efficiency and a low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting a fixed length instruction format having a power of 2 but a smaller bit number than that of the maximum data word length fed to instruction execution means. And, the control of the coded division is executed by noting the code bits.

1 . A microcomputer comprising: 
 a CPU;    an instruction memory for storing an instruction to be fed to said CPU:    a data memory for storing data; and    bus means for coupling said CPU to said instruction memory and said data memory to transfer said instruction and said data,    wherein said data contain bits of an m-th power of 2, wherein said bus means includes an m-number of signal lines for transferring said data, wherein said instruction contains bits of an n-th power of 2, and wherein m≧n.    
   
   
       2 - 21 . (canceled)