Semiconductor bonding and layer transfer method

Abstract

The present invention provides a method of coupling substrates together. The method includes providing first and second substrates and then coupling the first and second substrates together. One of the first and second substrates includes devices with an interconnect region positioned thereon and the other substrate carries a device structure.

1 . A method of forming circuitry comprising: 
 providing a first substrate with electronic devices formed thereon;    providing an interconnect region on a surface of the first substrate, the interconnect region having conductive interconnects and vias extending therethrough;    providing a second substrate with a device structure positioned thereon, the device structure including a stack of semiconductor layers; and    coupling the device structure to the interconnect region.    
     
     
         2 . The method of  claim 1  further including providing a contact region so that the device structure and interconnect region are coupled together through the contact region.  
     
     
         3 . The method of  claim 2  wherein the contact region includes at least one of a conductive glue layer, a conductive layer, and a silicide layer.  
     
     
         4 . The method of  claim 2  further including providing a dielectric region on the device structure so that the device structure and interconnect region are coupled together through the first contact region and the dielectric region.  
     
     
         5 . The method of  claim 1  wherein the step of coupling the device structure to the interconnect region includes providing heat to them.  
     
     
         6 . The method of  claim 1  wherein the step of providing the interconnect region includes providing a blocking region positioned to reduce the flow of contaminants therethrough.  
     
     
         7 . The method of  claim 1  further including removing at least a portion of the second substrate from the device structure.  
     
     
         8 . The method of  claim 1  further including providing a detaching layer carried by the second substrate, the detaching layer extending proximate to the device structure.  
     
     
         9 . The method of  claim 8  further including removing the second substrate from the device structure by separating them along the detaching layer.  
     
     
         10 . The method of  claim 1  further including providing the stack of semiconductor layers on the donor substrate has at least one single crystalline semiconductor layer.  
     
     
         11 . A method of forming a circuit comprising: 
 providing a handle substrate;    providing a donor substrate with a device structure positioned thereon, the device structure including a stack of semiconductor layers;    coupling the first and second substrates together;    removing the donor substrate from the first device structure so that the first device structure is carried by the handle substrate;    providing an acceptor substrate which carries an interconnect region, the interconnect region being electrically coupled to electronic devices carried by the acceptor substrate;    coupling the first device structure and interconnect region together; and    removing the handle substrate and the first and second dielectric regions.    
     
     
         12 . The method of  claim 11  further including providing a contact region so that, after the donor wafer is removed, the first device structure and interconnect region are coupled together through the contact region.  
     
     
         13 . The method of  claim 11  wherein the step of providing the interconnect region includes providing a blocking region positioned to reduce the flow of contaminants therethrough.  
     
     
         14 . The method of  claim 11  further including etching portions of the device structure to form at least one electrical device, the electrical device(s) being coupled to the electronic devices carried by the acceptor wafer through the interconnect region.  
     
     
         15 . A method of forming a circuit comprising: 
 providing a first substrate;    positioning an interconnect region on a surface of the first substrate, the interconnect region having conductive interconnects and vias extending therethrough;    providing a second substrate;    positioning a device structure on a surface of the second substrate, the device structure including a stack of doped semiconductor material layers; and    coupling the device structure to the interconnect region.    
     
     
         16 . The method of  claim 15  further including forming electronic devices near the surface of the first substrate.  
     
     
         17 . The method of  claim 15  wherein the step of coupling the device structure to the interconnect region includes providing heat to them.  
     
     
         18 . The method of  claim 15  wherein the step of providing the interconnect region includes providing a blocking region positioned therein to reduce the flow of oxygen therethrough.  
     
     
         19 . The method of  claim 15  further including processing the device structure to form at least one memory device therewith.  
     
     
         20 . The method of  claim 15  further including removing the second substrate from the device structure after the device structure has been coupled to the interconnect region.