Display control device and mobile electronic apparatus

Abstract

A display control device and technique for controlling displays on a display unit, in which a plurality of display segments are two-dimensionally arranged (e.g. a dot matrix type display unit), is provided. The technique is effectively applicable to a write data latch circuit of a memory for storing display data in the display control device, such as, for example, a liquid crystal display control device, a mobile electronic apparatus, etc. A display drive control technique for controlling a moving picture display mode of a display device is also provided. The display drive control circuit controls a picture display mode of a display device for displaying still pictures and moving pictures to a liquid crystal display device, such as, for example, a dot matrix type display devices, an organic EL display device, etc.

1 . A display drive control circuit comprising: 
 a still-picture-text-system-I/O bus-interface;    an external display interface for inputting a moving picture from a picture data processor;    a picture display memory having a picture data storing area of at least one frame; and    a display drive circuit for supplying display data to a display device.    
   
   
       2 . A display drive control circuit according to  claim 1 , further comprising a display operation change register and a memory access change register for selectively connecting display data of said still-picture-text-system-I/O bus-interface and external display interface for writing and reading operations of said picture display memory.  
   
   
       3 . A display drive control circuit according to  claim 1 , 
 further comprising an input terminal of vertical synchronization signal of moving picture data,    wherein the write and read timings of the moving picture display data to said picture display memory are controlled with the vertical synchronization signal inputted from said vertical synchronization signal input terminal.    
   
   
       4 . A display drive control circuit according to  claim 1 , further comprising an enable signal input terminal for designating said moving picture display area on the screen of said display device.  
   
   
       5 . A display drive control circuit according to  claim 1 , further comprising an enable signal input terminal which designates an area for updating a part of the still picture in the still picture display area of said display device.  
   
   
       6 . A display drive control circuit comprising: 
 a first port to which moving picture data is transferred; and    a second port to which still picture data is transferred.    
   
   
       7 . A display drive control circuit comprising: 
 a memory for storing picture data to be supplied to a display panel;    a first port to which moving picture data is transferred as said picture data stored in said memory; and    a second port to which still picture data is transferred as said picture data stored in said memory.    
   
   
       8 . A display drive control circuit comprising: 
 a memory for storing picture data to be supplied to the display screen of a display panel;    a first port to which moving picture data is transferred as said picture data stored in said memory; and    an external signal terminal to which a signal indicating the start of said display picture is supplied,    wherein transfer of said moving picture data is started in synchronization with said signal supplied to said external terminal.    
   
   
       9 . A display drive control circuit according to  claim 8 , further comprising a second port to which still picture data is transferred as said picture data stored in said memory.  
   
   
       10 . A display drive control circuit comprising: 
 a memory for storing picture data to be supplied to the display screen of a display panel;    a port to which moving data is transferred as said picture data stored in said memory; and    an external terminal for receiving a signal instructing write operation of said moving picture data to the predetermined area of said memory.    
   
   
       11 . A display drive control circuit comprising: 
 a memory for storing picture data to be supplied to a display panel;    a first port to which moving picture data is transferred as said picture data stored in said memory;    a second port to which still picture data is transferred as said picture data stored in said memory; and    a first control register for designating any one of said moving picture data supplied to said first port and the still picture data supplied said second port at the time of writing said picture data to said memory.    
   
   
       12 . A display drive control circuit comprising: 
 a clock generation circuit for generating an internal operation clock;    a memory for storing picture data to be supplied to a display panel;    a first port to which moving data is transferred in synchronization with a synchronization signal as said picture data stored in said memory;    a second port to which still picture data is transferred as said picture data stored in said memory; and    a first control register for controlling read operation of said picture data from said memory,    wherein said still picture data supplied to said second port is written to said memory in synchronization with said internal operation clock, and    wherein said first control register designates any one of the read operation synchronized with said synchronization signal and the read operation synchronized with said internal clock signal at the time of reading said picture data from said memory.    
   
   
       13 . A display drive control circuit according to  claim 2 , further comprising an enable signal input terminal for designating said moving picture display area on the screen of said display device.  
   
   
       14 . A display drive control circuit according to  claim 3 , further comprising an enable signal input terminal for designating said moving picture display area on the screen of said display device.  
   
   
       15 . A display drive control circuit according to  claim 2 , further comprising an enable signal input terminal which designates an area for updating a part of the still picture in the still picture display area of said display device.  
   
   
       16 . A display drive control circuit according to  claim 3 , further comprising an enable signal input terminal which designates an area for updating a part of the still picture in the still picture display area of said display device.  
   
   
       17 . A display control device comprising: 
 a display memory which is capable of storing display data for a display device and into which display data are written in a prescribed number of bits at a time, the display control device successively reading the display data out of the display memory and forming and supplying a drive signal to the display device,    wherein said display memory includes: 
 a memory array provided with a plurality of memory cells arranged in a matrix form,  
 a plurality of word lines to which selection terminals for the memory cells are connected,  
 a plurality of bit lines which are arranged in a direction to cross the word lines and to which data input/output nodes for the memory cells are connected, and  
 input transfer means and output transfer means being connected to said bit lines, data transferring by said input transfer means resulting in writing of data into the memory cells connected to a word line in a selected state, and data transferring by said output transfer means resulting in reading of data out of the memory cells connected to the word line in a selected state, and  
   wherein said display memory further includes a plurality of first data latch means capable of successively taking in the display data in said prescribed number of bits at a time, and display data held by the first data latch means can be collectively transferred by said input transfer means to the bit lines of said display memory in a number of bits at a time equal to an integral multiple of (n times) the number of bits of the display data taken into the first data latch means.    
   
   
       18 . The display control device according to  claim 17 , further comprising: 
 a plurality of second data latch means capable of taking in display data held by said first data latch means in a number of bits at a time equal to an integral multiple of the number of bits of the display data taken into said first data latch means,    wherein said input transfer means are configured to be capable of transferring display data held by the second data latch means to the bit lines of said display memory in a number of bits at a time equal to an integral multiple of (n times) the number of bits of the display data taken into said first data latch means.    
   
   
       19 . The display control device according to  claim 18 , wherein transferring of data by said input transfer means to the bit lines of said display memory takes place at the same timing as the final data taken into said first data latch means.  
   
   
       20 . The display control device according to  claim 17 , wherein the number of said first data latch means is an integral multiple further of said n times.  
   
   
       21 . The display control device according to  claim 20 , further comprising a mask setting means capable of setting the number of bits of data to be transferred by said input transfer means to the bit lines of said display memory, wherein said input transfer means is controlled on the basis of the set information of the mask setting means.  
   
   
       22 . The display control device according to  claim 21 , wherein said mask setting means can set the start address of write data in a range of consecutive addresses and the quantity of data to be masked from that start address and the end address of the same and the quantity of data to be masked from that end address.  
   
   
       23 . The display control device according to  claim 22 , further comprising: 
 segment drive means for generating signals for driving segment electrodes of an external liquid crystal display device on the basis of display data read out of said display memory,    wherein said display control device is configured as a semiconductor integrated circuit over a single semiconductor chip.    
   
   
       24 . A mobile electronic apparatus comprising: 
 the display control device according to  claim 17;     a data processing unit for generating display data to be written into said display memory and setting information on their writing position; and    a display device for carrying out displaying with a display drive signal read out of said display memory and formed by said display control device on the basis of the display data.    
   
   
       25 . The mobile electronic apparatus according to  claim 24 , wherein said display device is a dot matrix type liquid crystal display device.  
   
   
       26 . The mobile electronic apparatus according to  claim 24 , 
 wherein said display control device comprises a segment drive means for generating signals for driving segment electrodes of said liquid crystal display device, and a common electrode drive circuit for generating a signal for driving common electrodes of said liquid crystal display device is configured as a semiconductor integrated circuit over a separate semiconductor chip from the semiconductor chip over which said display control device is formed, and the common electrode drive circuit is configured of an element higher in withstand voltage than the elements constituting said display control device.    
   
   
       27 . A display control device formed over a single semiconductor substrate, comprising: 
 a memory for storing display data to be displayed on a liquid crystal panel;    a k-bit first external terminal to which display data to be stored in said memory are supplied from a microprocessor;    a plurality of second external terminals for outputting drive signals for driving said liquid crystal panel on the basis of m-bit read data from said memory;    a first latch circuit connected between the input of said memory and said first external terminal and capable of storing m-bit display data; and    a transfer circuit for selecting, for each integral multiple (multiple by n) of said k bits, display data of not more than said m bits (ken) in said first latch circuit and transferring them to bit lines of said memory.    
   
   
       28 . The display control device according to  claim 27 , further comprising: 
 a second latch circuit provided between said transfer circuit and said first latch circuit and capable of storing said m-bit display data,    said second latch circuit outputting display data of said number of bits (ken) to said transfer circuit.    
   
   
       29 . The display control device according to  claim 27 , 
 wherein said display control device has a control register for setting a first operating mode and a second operating mode,    wherein the mode of writing into said memory is set in said first operating mode in response to the setting of a first value into said control register,    wherein the mode of writing into said memory is set in said second operating mode in response to the setting of a second value into said control register, and    wherein said transfer circuit transfers, for each integral multiple (multiple by n) of said k bits stored in said first latch circuit, said display data to bit lines of said memory in response to setting into said first operating mode and, for every k bits stored in said first latch circuit, said display data to bit lines of said memory in response to setting into said second operating mode.    
   
   
       30 . The display control device according to  claim 29 , further comprising a segment driver for forming a drive signal to be supplied to a segment line of said liquid crystal panel in response to read data from said memory.  
   
   
       31 . The display control device according to  claim 30 , further comprising a gradation voltage generator and a gradation voltage select circuit for selecting, in response to read data from said memory, a desired gradation voltage out of a plurality of gradation voltages generated by said gradation voltage generator.  
   
   
       32 . The display control device according to  claim 31 , further comprising a common driver for forming a drive signal for periodically driving a plurality of common lines of said liquid crystal panel.  
   
   
       33 . The display control device according to  claim 31 , further comprising a mask setting circuit capable of setting the number of bits of data to be supplied to bit lines of said memory, 
 said transfer circuit being controlled on the basis of information set in said mask setting circuit.    
   
   
       34 . A display control device, formed over a single semiconductor substrate, comprising: 
 a memory for storing display data to be displayed on a liquid crystal panel capable of color displaying;    a k-bit first external terminal to which display data to be stored in said memory are supplied from a microprocessor;    a plurality of second external terminals for outputting drive signals for driving said liquid crystal panel on the basis of m-bit read data from said memory;    a first latch circuit connected between the input of said memory and said first external terminal and capable of storing m-bit display data;    a transfer circuit for selecting, for each integral multiple (multiple by n) of said k bits, display data of not more than said m bits (ken) in said first latch circuit and transferring them to bit lines of said memory;    a gradation voltage generator;    a gradation voltage select circuit for selecting, in response to read data from said memory, a desired gradation voltage out of a plurality of gradation voltages generated by said gradation voltage generator; and    a segment driver for forming a drive signal to be supplied to a segment line of said liquid crystal panel on the basis of said selected gradation voltage.    
   
   
       35 . The display control device according to  claim 34 , further comprising a common driver for forming a drive signal for periodically driving a plurality of common lines of said liquid crystal panel.  
   
   
       36 . The display control device according to  claim 34 , further comprising a mask setting circuit capable of setting the number of bits of data to be supplied to bit lines of said memory, 
 said transfer circuit being controlled on the basis of information set in said mask setting circuit.    
   
   
       37 . A mobile electronic apparatus comprising: 
 a liquid crystal panel including a plurality of common electrodes, a plurality of segment electrodes, and a plurality of dots driving by the difference in potential between said plurality of common electrodes and said plurality of segment electrodes;    a data processing unit for generating display data to be displayed on said liquid crystal panel; and    a display control device,    wherein said display control device includes: 
 a memory for storing display data to be displayed on said liquid crystal panel;  
 a k-bit first external terminal to which display data to be stored in said memory are supplied from said data processing unit;  
 a plurality of second external terminals for outputting drive signals for driving said liquid crystal panel on the basis of m-bit read data from said memory;  
 a first latch circuit connected between the input of said memory and said first external terminal and capable of storing m-bit display data;  
 a transfer circuit for selecting, for each integral multiple (multiple by n) of said k bits, display data of not more than said m bits (ken) in said first latch circuit and transferring them to bit lines of said memory;  
 a gradation voltage generator;  
   a gradation voltage select circuit for selecting, in response to read data from said memory, a desired gradation voltage out of a plurality of gradation voltages generated by said gradation voltage generator; and 
 a segment driver for forming a drive signal to be supplied to a segment line of said liquid crystal panel on the basis of said selected gradation voltage.  
   
   
   
       38 . The mobile electronic apparatus according to  claim 37 , wherein said display control device further comprises a common driver for forming a drive signal for periodically driving a plurality of common lines of said liquid crystal panel.  
   
   
       39 . The mobile electronic apparatus according to  claim 37 , wherein said display control device further comprises a mask setting circuit capable of setting the number of bits of data to be supplied to bit lines of said memory, 
 said transfer circuit being controlled on the basis of information set in said mask setting circuit.    
   
   
       40 . The mobile electronic apparatus according to  claim 37 , wherein said liquid crystal panel is capable of color displaying in which each picture element comprises three dots of red, green and blue.