Method for fabricating dual-metal gate device
Abstract
A method of fabricating a MOS transistor that comprises a dual-metal gate that is formed from heterotypical metals. A gate dielectric ( 34 ), such as HfO 2 , is deposited on a semiconductor substrate. A sacrificial layer ( 35 ), is next deposited over the gate dielectric. The sacrificial layer is patterned so that the gate dielectric over a first (pMOS, for example) area ( 32 ) of the substrate is exposed and gate dielectric over a second (nMOS, for example) area ( 33 ) of the substrate continues to be protected by the sacrificial layer. A first gate conductor material ( 51 ) is deposited over the remaining sacrificial area and over the exposed gate dielectric. The first gate conductor material is patterned so that first gate conductor material over the second area of the substrate is etched away. The sacrificial layer over the second area prevents damage to the underlying dielectric material as the first gate conductor material is removed.
Claims
exact text as granted — not AI-modified1 - 26 . (canceled)
27 . A semiconductor device fabricated by a process that comprises the steps:
providing a semiconductor substrate having a first area of a first conductivity type and a second area of a second conductivity type; forming a dielectric material on a surface of the substrate over the first area and over the second area; forming a sacrificial layer so that the dielectric material over the first area is exposed and dielectric material over the second area is protected by remaining sacrificial layer; depositing a first gate conductor material over the exposed dielectric material; removing the remaining sacrificial layer so as to expose the first gate conductor material over the second area; and depositing a second gate conductor material on the exposed first gate conductor material over the second area.
28 . A semiconductor device as defined in claim 27 , wherein the dielectric material is a MeOx.
29 . A semiconductor device as defined in claim 28 , wherein the MeOx is selected from the group consisting of HfO 2 and oxides or oxynitrides of zirconium, hafnium, aluminum, lanthanum, strontium, titanium, silicon and combinations thereof.
30 . A semiconductor device as defined in claim 29 , wherein the sacrificial layer is silicon dioxide.
31 . A semiconductor device as defined in claim 28 , wherein the first gate conductor material and the second gate conductor material have distinguishably different work functions.
32 . A semiconductor device as defined in claim 31 , wherein the first area of the substrate accommodates the formation of a pMOS transistor and the second area of the substrate accommodates the formation of an nMOS transistor.
33 . A semiconductor device as defined in claim 32 , wherein the first gate conductor material has a work function that approximates the valence band of silicon and the second gate conductor material has a work function that approximates the conduction band of silicon.
34 . A semiconductor device as defined in claim 33 , wherein the first gate conductor material is selected from the group of materials consisting of rhenium, iridium, platinum, and molybdenum, ruthenium and ruthenium oxide.
35 . A semiconductor device as defined in claim 34 , wherein the second gate conductor material is selected from the group of materials consisting of TaSiN and titanium, vanadium, zirconium, tantalum, aluminum, niobium, and tantalum nitride.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.