US2005285109A1PendingUtilityA1

Novel conductive elements for thin film transistors used in a flat panel display

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Assignee: KIM TAE-SUNGPriority: Mar 12, 2003Filed: Aug 19, 2005Published: Dec 29, 2005
Est. expiryMar 12, 2023(expired)· nominal 20-yr term from priority
Inventors:Tae-Sung Kim
H10D 86/00H10D 30/6739
45
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Claims

Abstract

Provided is a structure for conductive members in a TFT display. The structure is aluminum based and is heat treated. When heat treated, no hillocks are formed because of the presence of a titanium layer. Furthermore, TiAl 3 is not formed because of the presence of a TiN diffusion layer between the aluminum and the Ti layers. This novel structure has a low resistivity and is therefore suited for large displays that use thin film transistors to drive the pixels.

Claims

exact text as granted — not AI-modified
1 . (canceled)  
   
   
       2 . A thin film transistor, comprising a source electrode, a drain electrode, a gate electrode, and a semiconductor layer: 
 wherein one of the source electrode, the drain electrode, and the gate electrode includes an orderly stacked structure of a titanium layer, an aluminum-based metal layer, and a titanium layer; and    wherein a diffusion prevention layer is interposed between at least one of the titanium layers and the aluminum-based layer.    
   
   
       3 . The thin film transistor of  claim 2 , wherein the diffusion prevention layer comprises a titanium nitride layer.  
   
   
       4 . The thin film transistor of  claim 3 , wherein the titanium nitride layer contains 5 to 85 wt % of nitrogen.  
   
   
       5 . The thin film transistor of  claim 3 , wherein the titanium nitride layer has a thickness of about 100 to 600 Å.  
   
   
       6 . The thin film transistor of  claim 5 , wherein the titanium nitride layer has a thickness of about 100 to 400 Å.  
   
   
       7 . The thin film transistor of  claim 6 , wherein the titanium nitride layer has a thickness of 200 to 400 Å.  
   
   
       8 . The thin film transistor of  claim 7 , wherein the titanium nitride layer has a thickness of about 300 Å.  
   
   
       9 . The thin film transistor of  claim 2 , wherein the aluminum-based metal layer comprises an aluminum alloy containing about 0.5 to 5 wt % of one element selected from a group consisting of silicon, copper, neodymium, platinum, and nickel.  
   
   
       10 . The thin film transistor of  claim 9 , wherein the aluminum-based metal layer comprises an aluminum-silicon alloy containing about 2 wt % of silicon.  
   
   
       11 . (canceled)  
   
   
       12 . A flat panel display, comprising a plurality of sub-pixels driven by thin film transistors, each of the thin film transistors including a source electrode, a drain electrode, a gate electrode, and a semiconductor layer; 
 wherein at least one of the source electrode, the drain electrode, and the gate electrode including an orderly stacked structure of a titanium layer, an aluminum-based metal layer, and a titanium layer; and    wherein a diffusion prevention layer is interposed between at least one of the titanium layers and the aluminum-based layer.    
   
   
       13 . The flat panel display of  claim 12 , wherein the diffusion prevention layer comprises a titanium nitride layer.  
   
   
       14 . The flat panel display of  claim 13 , wherein the titanium nitride layer contains 5 to 85 wt % of nitrogen.  
   
   
       15 . The flat panel display of  claim 13 , wherein the titanium nitride layer has a thickness of about 100 to 600 Å.  
   
   
       16 . The flat panel display of  claim 15 , wherein the titanium nitride layer has a thickness of about 100 to 400 Å.  
   
   
       17 . The flat panel display of  claim 16 , wherein the titanium nitride layer has a thickness of 200 to 400 Å.  
   
   
       18 . The flat panel display of  claim 17 , wherein the titanium nitride layer has a thickness of about 300 Å.  
   
   
       19 . The flat panel display of  claim 12 , wherein the aluminum-based metal layer comprises an aluminum alloy containing about 0.5 to 5 wt % of one element selected from a group consisting of silicon, copper, neodymium, platinum, and nickel.  
   
   
       20 . The flat panel display of  claim 19 , wherein the aluminum-based metal layer comprises an aluminum-silicon alloy containing about 2 wt % of silicon.  
   
   
       21 . (canceled)  
   
   
       22 . A flat panel display, comprising: 
 driving circuits disposed along edges of said display;    a plurality of sub-pixels driven by thin film transistors; and    conductive lines connecting the driving circuits disposed along edges of said display to each of said plurality of sub-pixels;    wherein said conductive lines includes an orderly stacked structure of a titanium layer, an aluminum-based metal layer, and a titanium layer; and    wherein a diffusion prevention layer is interposed between at least one of the titanium layers and the aluminum-based layer.    
   
   
       23 . The flat panel display of  claim 22 , wherein the diffusion prevention layer comprises a titanium nitride layer.  
   
   
       24 . (canceled)  
   
   
       25 . The display of  claim 22 , wherein said conductive lines have been subjected to a heat treatment of 380° C.  
   
   
       26 . A method of manufacturing a thin film transistor, the method comprising; 
 forming a source electrode;    forming a drain electrode;    forming a gate electrode; and    forming a semiconductor layer;    wherein at least one of the source electrode, the drain electrode, and the gate electrode is formed as an orderly stacked structure of a titanium layer, an aluminum-based metal layer, and a titanium layer; and    wherein a diffusion prevention layer is interposed between at least one of the titanium layers and the aluminum-based layer.    
   
   
       27 . A method of manufacturing a flat panel display, the method comprising: 
 forming a plurality of sub-pixels driven by thin film transistors, each of the thin film transistors formed to include: 
 a source electrode;  
 a drain electrode;  
 a gate electrode; and  
 a semiconductor layer;  
   wherein at least one of the source electrode, the drain electrode, and the gate electrode is formed as an orderly stacked structure of a titanium layer, an aluminum-based metal layer, and a titanium layer; and    wherein a diffusion prevention layer is interposed between at least one of the titanium layers and the aluminum-based layer.    
   
   
       28 . A method of manufacturing a flat panel display, the method comprising: 
 forming driving circuits disposed along edges of said display;    forming a plurality of sub-pixels driven by thin film transistors; and    forming conductive lines connecting the driving circuits disposed along edges of said display to each of said plurality of sub-pixels;    wherein said conductive lines are formed as an orderly stacked structure of a titanium layer, an aluminum-based metal layer, and a titanium layer; and    wherein a diffusion prevention layer is interposed between at least one of the titanium layers and the aluminum-based layer.

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