Semiconductor device and method of manufacturing same

Abstract

A semiconductor device and related method of manufacture are disclosed. The semiconductor device comprises a gate electrode formed on a semiconductor substrate, an active region containing spaces formed below the gate electrode, a channel region formed between the gate electrode and the spaces, and source and drain regions formed on opposite sides of the gate electrode within the active region. The spaces are formed by etching a semiconductor layer formed below the gate electrode in the active region.

1 . A semiconductor device, comprising: 
 a gate electrode formed on a semiconductor substrate;    an active region comprising spaces formed below the gate electrode;    a channel region formed between the gate electrode and the spaces; and,    source and drain regions respectively formed within the active region on opposite sides of the gate electrode.    
   
   
       2 . The semiconductor device of  claim 1 , wherein the channel region comprises a silicon (Si) layer; and, 
 wherein the source and drain regions are formed of a Si layer, a silicon carbide (SiC) layer, or a silicon germanium (SiGe) layer.    
   
   
       3 . The semiconductor device of  claim 1 , wherein the spaces extend to completely overlap the channel region and at least one of the source and drain regions.  
   
   
       4 . The semiconductor device of  claim 1 , wherein the spaces extend to completely overlap the channel region, and at least partially overlap at least one of the source and drain regions.  
   
   
       5 . The semiconductor device of  claim 4 , further comprising: 
 a semiconductor layer formed between the semiconductor substrate and the source and drain regions to define a length of the spaces.    
   
   
       6 . The semiconductor device of  claim 5 , wherein the semiconductor layer comprises a SiGe layer.  
   
   
       7 . The semiconductor device of  claim 1 , further comprising an insulating layer filling the spaces.  
   
   
       8 . The semiconductor device of  claim 7 , wherein the insulating layer is formed of an oxide layer or a nitride layer.  
   
   
       9 . A method of manufacturing a semiconductor device, comprising: 
 forming a first silicon germanium (SiGe) layer formed on a bulk semiconductor substrate;    forming a silicon (Si) layer on the first SiGe layer;    defining an active region on the semiconductor substrate;    sequentially forming a gate insulating layer and a gate electrode on the Si layer;    selectively removing portions of the Si layer and the first SiGe layer to form a recess region exposing the semiconductor substrate, the recess region being formed in the active region near the gate electrode;    forming a semiconductor layer within the recess region;    selectively removing the first SiGe layer to form spaces below the Si layer in the active region;    epitaxially growing Si, such that the Si layer and the semiconductor layer are joined; and,    forming source and drain regions in the semiconductor layer.    
   
   
       10 . The method of  claim 9 , wherein the semiconductor layer comprises: 
 a first semiconductor layer formed from a second SiGe layer, and a second semiconductor layer formed from a Si layer or a SiC layer.    
   
   
       11 . The method of  claim 10 , wherein Ge concentration in the second SiGe layer is substantially equal to Ge concentration in the first SiGe layer.  
   
   
       12 . The method of  claim 10 , wherein the first semiconductor layer is selectively and simultaneously removed with the selective removal of the first SiGe layer; and 
 wherein the spaces extended from a lower portion of the Si layer to a lower portion of the second semiconductor layer.    
   
   
       13 . The method of  claim 12 , wherein the first semiconductor layer is completely and simultaneously removed.  
   
   
       14 . The method of  claim 12 , wherein the first semiconductor layer is partially simultaneously removed.  
   
   
       15 . The method of  claim 9 , wherein the semiconductor layer is formed from a single layer comprising a Si layer, a SiC layer, or a SiGe layer.  
   
   
       16 . The method of  claim 15 , wherein the semiconductor layer is not removed with the first SiGe layer.  
   
   
       17 . The method of  claim 9 , wherein the spaces are formed only below the Si layer.  
   
   
       18 . The method of  claim 15 , wherein the semiconductor layer is formed from a SiGe layer having a concentration of Ge which is lower than a concentration of Ge in the first SiGe layer.  
   
   
       19 . The method of  claim 9 , further comprising: 
 forming an insulating layer to fill the spaces.    
   
   
       20 . The method of  claim 19 , wherein the insulating layer is formed from an oxide layer or a nitride layer.  
   
   
       21 . A method of manufacturing a semiconductor device, comprising: 
 forming a gate electrode on a semiconductor substrate;    forming spaces in an active region below the gate electrode;    forming a channel region between the gate electrode and the spaces; and,    forming source and gate regions on opposite sides of the gate electrode within the active region.