Thin film transistor and method for fabricating the same
Abstract
A thin film transistor that has improved characteristics and uniformity is developed by uniformly controlling low concentration of crystallization catalyst and controlling crystallization position so that no seed exists and no grain boundary exists, or one grain boundary exists in a channel layer of the thin film transistor. The thin film transistor includes a substrate; a semiconductor layer pattern which is formed on the substrate, the semiconductor layer pattern having a channel layer of which no seed exists and no grain boundary exists; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film. A method for fabricating the thin film transistor includes forming an amorphous silicon layer on a substrate; forming a semiconductor layer pattern having a channel layer in which no seed exists and no grain boundary exists by crystallizing and patterning the amorphous silicon layer; forming a gate insulating film on the semiconductor layer pattern; and forming a gate electrode on the gate insulating film.
Claims
exact text as granted — not AI-modified1 . A thin film transistor comprising:
a substrate; a semiconductor layer pattern formed on the substrate, the semiconductor layer pattern having a channel layer, the channel layer having no seed and no grain boundary; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film.
2 . The thin film transistor according to claim 1 , wherein the semiconductor layer pattern has a source region and a drain region, wherein a seed is formed in the source region or the drain region, and wherein a width and a length of the semiconductor layer pattern are each shorter than a radius of a grain formed by the seed.
3 . The thin film transistor according to claim 1 , wherein the semiconductor layer pattern has a source region and a drain region, wherein a seed is formed on an outer part of the channel layer between the source region and the drain region, and wherein a width and a length of the semiconductor layer pattern are each shorter than a diameter of a grain formed by the seed.
4 . The thin film transistor according to claim 1 , wherein the channel layer has a crystallinity of about 0.7 to 0.9.
5 . The thin film transistor according to claim 1 , wherein the thin film transistor is used in a liquid crystal display (LCD) device or an organic electroluminescence device.
6 . A thin film transistor comprising:
a substrate; a semiconductor layer pattern formed on the substrate, the semiconductor layer pattern having a channel layer, the channel layer having a single grain boundary; a gate insulating film formed on the semiconductor layer pattern; and a gate electrode formed on the gate insulating film.
7 . The thin film transistor according to claim 6 , wherein the semiconductor layer pattern has a source region and a drain region, wherein a seed is formed in the source region or the drain region, and a length of the semiconductor layer pattern is about 1.1 to 1.3 times the radius of a grain formed by the seed.
8 . The thin film transistor according to claim 5 , wherein the thin film transistor is used in a liquid crystal display (LCD) device or an organic electroluminescence device.
9 . A method for fabricating a thin film transistor comprising:
forming an amorphous silicon layer on a substrate; forming a semiconductor layer pattern having a channel layer in which no seed exists and no grain boundary exists by crystallizing and patterning the amorphous silicon layer; forming a gate insulating film on the semiconductor layer pattern; and forming a gate electrode on the gate insulating film.
10 . The method for fabricating the thin film transistor according to claim 9 , wherein the forming the semiconductor layer pattern comprises:
forming a capping layer on the amorphous silicon layer; forming a grooved part on the capping layer so that a seed is formed in a source region or a drain region of the semiconductor layer pattern; forming a metal catalyst layer on the capping layer; diffusing a metal catalyst of the metal catalyst layer into the amorphous silicon layer; and forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer using the diffused metal catalyst.
11 . The method for fabricating the thin film transistor according to claim 9 , wherein the forming the semiconductor layer pattern comprises:
forming a first capping layer on the amorphous silicon layer; patterning the first capping layer so that a seed is formed in a source region or a drain region of the semiconductor layer pattern; forming a second capping layer on the patterned first capping layer; forming a metal catalyst layer on the second capping layer; diffusing a metal catalyst of the metal catalyst layer into the amorphous silicon layer; and forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer using the diffused metal catalyst.
12 . The method for fabricating the thin film transistor according to claim 10 , wherein the semiconductor layer pattern is formed in such a manner that a width and a length of the semiconductor layer pattern are each shorter than a radius of a grain formed by the seed.
13 . The method for fabricating the thin film transistor according to claim 11 , wherein the semiconductor layer pattern is formed in such a manner that a width and a length of the semiconductor layer pattern are each shorter than a radius of a grain formed by the seed.
14 . The method for fabricating the thin film transistor according to claim 9 , wherein the forming the semiconductor layer pattern comprises:
forming a capping layer on the amorphous silicon layer; forming a grooved part on the capping layer so that a seed is formed on an outer part of a channel layer between a source region and a drain region of the semiconductor layer pattern; forming a metal catalyst layer on the capping layer; diffusing a metal catalyst of the metal catalyst layer into the amorphous silicon layer; and forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer using the diffused metal catalyst.
15 . The method for fabricating the thin film transistor according to claim 9 , wherein the forming the semiconductor layer pattern comprises:
forming a first capping layer on the amorphous silicon layer; patterning the first capping layer so that a seed is formed on an outer part of a channel layer between a source region and a drain region of the semiconductor layer pattern; forming a second capping layer on the patterned first capping layer; forming a metal catalyst layer on the second capping layer; diffusing a metal catalyst of the metal catalyst layer into the amorphous silicon layer; and forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer using the diffused metal catalyst.
16 . The method for fabricating the thin film transistor according to claim 14 , wherein the semiconductor layer pattern is formed in such a manner that a width and a length of the semiconductor layer pattern are each shorter than a diameter of a grain formed by the seed.
17 . The method for fabricating the thin film transistor according to claim 15 , wherein the semiconductor layer pattern is formed in such a manner that a width and a length of the semiconductor layer pattern are each shorter than a diameter of a grain formed by the seed.
18 . The method for fabricating the thin film transistor according to claim 10 , wherein the capping layer is formed of a silicon nitride film or a silicon oxide film.
19 . The method for fabricating the thin film transistor according to claim 14 , wherein the capping layer is formed of a silicon nitride film or a silicon oxide film.
20 . The method for fabricating the thin film transistor according to claim 11 , wherein the first capping layer pattern and the second capping layer are each formed of a silicon nitride film or a silicon oxide film.
21 . The method for fabricating the thin film transistor according to claim 15 , wherein the first capping layer pattern and the second capping layer are each formed of a silicon nitride film or a silicon oxide film.
22 . The method for fabricating the thin film transistor according to claim 11 , wherein a thickness of a part of the first capping layer pattern is thicker than that of the second capping layer.
23 . The method for fabricating the thin film transistor according to claim 15 , wherein a thickness of a part of the first capping layer pattern is thicker than that of the second capping layer.
24 . The method for fabricating the thin film transistor according to claim 11 , wherein a density of a part the first capping layer pattern is higher than that of the second capping layer.
25 . The method for fabricating the thin film transistor according to claim 15 , wherein a density of a part of the first capping layer pattern is higher than that of the second capping layer.
26 . A method for fabricating a thin film transistor comprising:
forming an amorphous silicon layer on a substrate; forming a semiconductor layer pattern having a channel layer in which one grain boundary exists by crystallizing and patterning the amorphous silicon layer; forming a gate insulating film on the semiconductor layer pattern; and forming a gate electrode on the gate insulating film.
27 . The method for fabricating the thin film transistor according to claim 26 , wherein the forming the semiconductor layer pattern comprises:
forming a capping layer on the amorphous silicon layer; forming a grooved part on the capping layer so that a seed is formed in a source region or a drain region of the semiconductor layer pattern; forming a metal catalyst layer on the capping layer; diffusing a metal catalyst of the metal catalyst layer into the amorphous silicon layer; and forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer using the diffused metal catalyst.
28 . The method for fabricating the thin film transistor according to claim 26 , wherein the forming the semiconductor layer pattern comprises:
forming a first capping layer on the amorphous silicon layer; patterning the first capping layer so that a seed is formed in a source region or a drain region of the semiconductor layer pattern; forming a second capping layer on the patterned first capping layer; forming a metal catalyst layer on the second capping layer; diffusing a metal catalyst of the metal catalyst layer into the amorphous silicon layer; and forming a polycrystalline silicon layer by crystallizing the amorphous silicon layer using the diffused metal catalyst.
29 . The method for fabricating the thin film transistor according to claim 27 , wherein the semiconductor layer pattern is formed in such a way that a length of the semiconductor layer pattern is about 1.1 to 1.3 times a radius of a grain formed by the seed.
30 . The method for fabricating the thin film transistor according to claim 28 , wherein the semiconductor layer pattern is formed in such a way that a length of the semiconductor layer pattern is about 1.1 to 1.3 times a radius of a grain formed by the seed.
31 . The method for fabricating the thin film transistor according to claim 27 , wherein the capping layer is formed of a silicon nitride film or a silicon oxide film.
32 . The method for fabricating the thin film transistor according to claim 28 , wherein the first capping layer pattern and the second capping layer are each formed of a silicon nitride film or a silicon oxide film.
33 . The method for fabricating the thin film transistor according to claim 28 , wherein a thickness of a part of the first capping layer pattern is thicker than that of the second capping layer.
34 . The method for fabricating the thin film transistor according to claim 28 , wherein a density of a part of the first capping layer pattern is higher than that of the second capping layer.Join the waitlist — get patent alerts
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