Non-volatile memory and method of manufacturing floating gate

Abstract

A method of manufacturing a floating gate is provided. The method includes the steps of forming a tunneling layer on a substrate, and forming a film layer containing a semiconductor component on the tunneling layer. The film layer consists of a semiconductor film or nano-dots.

1 . A non-volatile memory comprising: 
 a tunneling layer disposed on a substrate;    a dielectric layer disposed over the tunneling layer;    a floating gate disposed between the tunneling layer and the dielectric layer, wherein the floating gate contains a semiconductor component consisting of nano-dots or a thin film;    a control gate disposed on the dielectric layer; and    a source region and a drain region, disposed respectively on two sides of the control gate in the substrate.    
     
     
         2 . The non-volatile memory according to  claim 1 , wherein the semiconductor component contained in the floating gate is selected from the group consisting of Group II elements, Group III elements, Group IV elements, Group V elements, Group VI elements, and compounds thereof.  
     
     
         3 . The non-volatile memory according to  claim 1 , wherein the semiconductor component contained in the floating gate is selected from the group consisting of germanium (Ge), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), cadmium sulfide (CdS), zinc sulfide (ZnS), and zinc selenide (ZnSe).  
     
     
         4 . The non-volatile memory according to  claim 1 , wherein the floating gate consists of semiconductor oxide film, semiconductor oxide nano-dots, or semiconductor nano-dots.