Dielectric layer created using ALD to deposit multiple components

Abstract

A dielectric layer is created for use with non-volatile memory and/or other devices. The dielectric layer is created using atomic layer deposition to deposit multiple components whose mole fractions change as a function of depth in the dielectric layer in order to create a rounded bottom of a conduction band profile for the dielectric layer.

1 . A dielectric layer, comprising: 
 a first type of component added by atomic layer deposition; and    a second type of component added by atomic layer deposition, said first type of component and said second type of component have varying mole fractions as a function of depth in said dielectric layer in order to create a crested bottom of a conduction band profile for said dielectric layer.    
   
   
       2 . A dielectric layer according to  claim 1 , further comprising: 
 a third type of component, said third type of component have a varying mole fraction as a function of depth in said dielectric layer.    
   
   
       3 . A dielectric layer according to  claim 1 , wherein: 
 said first type of component and said second type of component have been annealed.    
   
   
       4 . A dielectric layer according to  claim 1 , wherein: 
 said dielectric layer includes multiple regions; and    each of said multiple regions includes said first component and said second component with varying mole fractions for said first component and said second component as a function of depth in said dielectric layer.    
   
   
       5 . A dielectric layer according to  claim 4 , wherein: 
 said multiple regions include a first edge region having a first conduction band bottom level, a middle region having a second conduction band bottom level and a second edge region having a third conduction band bottom level, said second conduction band bottom level is greater than said first conduction band bottom level and said third conduction band bottom level.    
   
   
       6 . A dielectric layer according to  claim 5 , wherein: 
 a first region of said multiple regions includes seven layers of said first component and one layer of said second component;    a second region of said multiple regions includes six layers of said first component and two layers of said second component;    a third region of said multiple regions includes five layers of said first component and three layers of said second component;    a fourth region of said multiple regions includes four layers of said first component and four layers of said second component;    a fifth region of said multiple regions includes five layers of said first component and three layers of said second component;    a sixth region of said multiple regions includes six layers of said first component and two layers of said second component; and    a seventh region of said multiple regions includes seven layers of said first component and one layer of said second component.    
   
   
       7 . A dielectric layer according to  claim 6 , wherein: 
 said crested bottom of a conduction band profile for said dielectric layer is a rounded bottom of a conduction band profile for said dielectric layer.    
   
   
       8 . A dielectric layer according to  claim 1 , wherein: 
 said crested bottom of a conduction band profile for said dielectric layer is a rounded bottom of a conduction band profile for said dielectric layer.    
   
   
       9 . A dielectric layer according to  claim 1 , wherein: 
 said first component is a first dielectric; and    said second component is a second dielectric.    
   
   
       10 . A dielectric layer according to  claim 1 , wherein: 
 said first component is Al 2 O 3; and      said second component is HfO 2 .    
   
   
       11 . A dielectric layer according to  claim 1 , wherein: 
 said second component has a mole fraction of zero at an edge of said dielectric layer.    
   
   
       12 . A dielectric layer according to  claim 1 , wherein: 
 said first component is at two edges of said dielectric layer and said second component is at a center of said dielectric layer, with a composition that gradually changes from the first component to said second component moving from either edge towards said center of said dielectric layer.    
   
   
       13 . A non-volatile storage device, comprising: 
 source/drain regions;    a channel region between said source/drain regions;    a floating gate;    a control gate;    a first dielectric region between said channel region and said floating gate, said first dielectric region includes a high-K material; and    a second dielectric region between said floating gate and said control gate, said second dielectric region includes a first component added by atomic layer deposition and a second component added by atomic layer deposition, said first component and said second component have varying mole fractions as a function of depth in said second dielectric region in order to create a rounded bottom of a conduction band profile for said second dielectric region,    wherein charge is transferred between said floating gate and said control gate via said second dielectric region.    
   
   
       14 . A non-volatile storage device according to  claim 13 , wherein: 
 said first type of component and said second type of component have been annealed.    
   
   
       15 . A non-volatile storage device according to  claim 13 , wherein: 
 said second dielectric region includes multiple regions;    each of said multiple regions includes said first component and said second component with varying mole fractions for said first component and said second component; and    said multiple regions include a first edge region having a first conduction band bottom level, a middle region having a second conduction band bottom level and a second edge region having a third conduction band bottom level, said second conduction band bottom level is greater than said first conduction band bottom level and said third conduction band bottom level.    
   
   
       16 . A non-volatile storage device according to  claim 13 , wherein: 
 said first component is a first dielectric; and    said second component is a second dielectric.    
   
   
       17 . A non-volatile storage device, comprising: 
 source/drain regions;    a channel region between said source/drain regions;    a floating gate;    a control gate; and    a dielectric layer between said floating gate and said control gate, said dielectric layer includes a two or more components added by atomic layer deposition, said two or more components having varying mole fractions as a function of depth in said dielectric layer.    
   
   
       18 . A non-volatile storage device according to  claim 17 , wherein: 
 said two or more components have been annealed.    
   
   
       19 . A non-volatile storage device according to  claim 17 , wherein: 
 said dielectric layer includes multiple regions; and    each of said multiple regions includes a first component and a second component with varying mole fractions for said first component and said second component as a function of depth in said dielectric layer.    
   
   
       20 . A non-volatile storage device according to  claim 16 , wherein: 
 said dielectric layer includes a first material and a second material;    said first material is at two edges of said dielectric layer and said second material is at a center of said dielectric layer;    between said edges and said center, said dielectric layer includes a composition that gradually changes from said first material to said second material moving from either edge towards said center of said dielectric layer.    
   
   
       21 . A non-volatile storage device according to  claim 17 , wherein: 
 said dielectric layer includes a first material and a second material; and    said second material has a mole fraction of zero at an edge of said dielectric layer.    
   
   
       22 . A non-volatile storage device according to  claim 17 , wherein: 
 said dielectric layer includes three components added by atomic layer deposition that have varying mole fractions as a function of depth in said dielectric layer.