Flat panel display device and fabrication method thereof
Abstract
A top-emitting organic light-emitting device can prevent a voltage drop by electrically coupling a cathode bus line to a cathode electrode. A method for fabricating the same is also disclosed. The flat panel display device comprises an insulating substrate having a pixel region and a non-pixel region, a first electrode arranged in the pixel region a second electrode arranged in the pixel region and the non-pixel region, an organic emission layer and a charge transporting layer formed between the first electrode and the second electrode of the pixel region, and an electrode line formed in the pixel region and the non-pixel region. The electrode line and the second electrode are electrically and directly coupled to each other in the non-pixel region.
Claims
exact text as granted — not AI-modified1 - 24 . (canceled)
25 A flat panel display, comprising:
a substrate having an emission region and a non-emission region; a first conductive line arranged in the emission region; a second conductive line arranged in the emission region and the non-emission region; an organic emission layer and a charge transporting layer arranged between the first conductive line and the second conductive line; and a third conductive line arranged on the substrate, wherein the third conductive line and the second conductive line are electrically coupled with each other in the non-emission region.
26 . The flat panel display device of claim 25 , wherein a pixel region includes the emission region where light is emitted from the organic emission layer, and
wherein the non-emission region, and the third electrode line is arranged in a portion of the non-emission region in the pixel region.
27 . The flat panel display device of claim 26 , wherein the third conductive line arranged in the portion of the non-emission region is a conductive material that absorbs an external light.
28 . The flat panel display device of claim 27 , wherein the charge transporting layer is arranged between a portion of the third conductive line and the second conductive line.
29 . The flat panel display device of claim 25 , wherein, the third conducive line is a stripe like shape or a matrix like shape that includes an open portion that corresponds to the emission region.
30 . The flat panel display device of claim 26 , where the charge transporting layer is arranged on substantially an entire surface of the pixel region.
31 . The flat panel display device of claim 25 , wherein, the charge transporting layer is arranged on the non-emission region and on the emission region.
32 . The flat panel display device of claim 25 , wherein the third conductive line has a current with a voltage having a same polarity as the second conductive line.
33 . The flat panel display device of claim 25 , wherein the third conductive line is a supplementary conductive line of the second conductive line.
34 . The flat panel display device of claim 25 , wherein the third conductive line is directly coupled to the second conductive line.
35 . The flat panel display device of claim 25 , wherein the third conductive line is arranged in a portion of the non-emission region so that the third conductive line is electrically coupled with the second conductive line in the non-emission region.
36 . The flat panel display device of claim 35 , wherein the third conductive line is directly coupled to the second conductive line.
37 . The flat panel display device of claim 35 , wherein the third conductive line is arranged along a peripheral area of the non-emission region on the substrate so that the third conductive line is electrically coupled with the second conductive line.
38 . The flat panel display device of claim 37 , wherein the third conductive line is directly coupled to the second conductive line.
39 . The flat panel display device of claim 35 , wherein the third conductive line is arranged in at least one outer side of the non-emission region so that the third conductive line is electrically coupled with the second conductive line.
40 . The flat panel display device of claim 39 , wherein the third conductive line is directly coupled to the second conductive line.
41 . The flat panel display device of claim 25 , wherein the organic emission layer is only arranged on the first conductive line, and the charge transporting layer is arranged on the non-emission region and on the emission region.
42 . A method for fabricating a flat panel display, comprising:
providing a substrate having an emission region and a non-emission region; forming a first conductive line on the emission region of the substrate; forming an organic emission layer and a charge transporting layer on the first conductive line; forming a third conductive line on the non-emission region; and forming a second conductive line over the substrate, wherein the third conductive line and the second conductive line are electrically coupled in the non-emission region.
43 . The method of claim 42 , further comprising:
using a fine metal mask to partially form the organic emission layer only on the first conductive, and using an open mask to form the charge transporting layer on the non-emission region and on the emission region using an open mask.
44 . The method of claim 42 , wherein a pixel region includes the emission region where light is emitted from the organic emission layer, and the non-emission region, and
wherein the third electrode line is arranged in a portion of the non-emission region in the pixel region.
45 . The method of claim 42 , wherein the third conductive line arranged in the portion of the non-emission region is a conductive material that absorbs external light.
46 . The method of claim 44 , where the charge transporting layer is arranged on substantially an entire surface of the pixel region.
47 . The method of claim 42 , where the charge transporting layer is arranged on the non-emission region and on the emission region.
48 . The method of claim 42 , wherein the charge transporting layer is formed between a portion of the third conductive line, which is formed in the portion of the non-emission region, and the second conductive line.
49 . The method of claim 42 , wherein the third conductive line is arranged in at least one outer side of the non-emission region on the substrate to be electrically coupled with the second conductive line.
50 . The method of claim 49 , wherein the third conductive line is directly coupled to the second conductive.
51 . The method of claim 42 , wherein the third conducive line is a stripe like shape or a matrix like shape having an open portion that corresponds to the emission region.
52 . The method of claim 42 , wherein the charge transporting layer is arranged on the non-emission region and on the emission region.
53 . The method of claim 42 , wherein the third conductive line has a current with a voltage having a same polarity as the second conductive line.
54 . The method of claim 42 , wherein the third conductive line is a supplementary conductive line of the second conductive line.
55 . The method of claim 42 , wherein the third conductive line is directly coupled to the second conductive.
56 . The method of claim 42 , wherein the third conductive line is arranged along a peripheral area of the non-emission region so that the third conductive line is electrically coupled with the second conductive line in the non-emission region.
57 . The method of claim 56 , wherein the third conductive line is directly coupled to the second conductive.Cited by (0)
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