Heatsink apparatus and thermally-conductive intermediate material for dissipating heat in semiconductor packages

Abstract

A semiconductor package comprising a die adjacent a lead frame die pad, said lead frame die pad adapted to dissipate heat from the die. The package further comprises a thermally-conductive material abutting the die and a heatsink abutting the thermally-conductive material, said heatsink facing a direction opposite from the lead frame die pad.

1 . A semiconductor package, comprising: 
 a die adjacent a lead frame die pad, said lead frame die pad adapted to dissipate heat from the die;    a thermally-conductive material abutting the die; and    a heatsink abutting the thermally-conductive material on an opposite side of said die from said lead frame die pad.    
   
   
       2 . The semiconductor package of  claim 1 , wherein the thermally-conductive material is a material selected from a group consisting of liquid attach, film attach, solder alloy, mold compound and interposer material.  
   
   
       3 . The semiconductor package of  claim 2 , wherein the interposer material is an adhesive, thermally-conductive tape.  
   
   
       4 . The semiconductor package of  claim 1 , wherein the heatsink is made of metal.  
   
   
       5 . The semiconductor package of  claim 1 , wherein the heatsink is made of thermally-conductive plastic.  
   
   
       6 . The semiconductor package of  claim 1 , wherein the lead frame die pad is adapted to dissipate heat from the die by transferring the heat to an adjacent circuit board.  
   
   
       7 . The semiconductor package of  claim 1 , wherein at least a portion of the package is encapsulated in a mold compound.  
   
   
       8 . The semiconductor package of  claim 1 , wherein the intermediate material reduces mechanical stress caused by multiple thermal expansion rates of the die.  
   
   
       9 . The semiconductor package of  claim 1 , further comprising a lead electrically coupled to the die, said lead adapted to transfer electrical signals between the die and a circuit board.  
   
   
       10 . The semiconductor package of  claim 1 , wherein the package is non-leaded.  
   
   
       11 . The semiconductor package of  claim 10 , wherein the package is selected from a group consisting of quad-flat no-lead packages and small-outline no-lead packages.  
   
   
       12 - 17 . (canceled)  
   
   
       18 . An apparatus, comprising: 
 a plurality of heatsinks, at least one of said heatsinks adapted to couple to a thermally-conductive material abutting a die on a semiconductor wafer; and    an aperture between at least some of the heatsinks, said aperture adapted to facilitate the deposition of a mold compound.    
   
   
       19 . The apparatus of  claim 18 , further comprising singulation lines.  
   
   
       20 . The apparatus of  claim 18 , wherein the aperture has a shape selected from a group consisting of a substantially rectangular shape and a cross shape.  
   
   
       21 . The apparatus of  claim 18 , wherein the thermally-conductive material reduces mechanical stress caused by varying thermal expansion rates of the die.  
   
   
       22 . A semiconductor package, comprising: 
 an integrated circuit element having a top surface adapted for connecting the chip electrically to leads external to the chip, and a bottom surface;    a heatsink having a top surface with a first area, and a substantially flat bottom surface with a smaller second area to which the top surface of the integrated circuit element is attached;    a die pad having a bottom surface, and a top surface to which the bottom surface of the integrated circuit element is attached; and    a mold compound element encapsulating the semiconductor package, including covering the bottom surface of the heatsink that is uncovered by the integrated circuit element, and the top surface of the die pad that is uncovered by the integrated circuit element.    
   
   
       23 . The semiconductor package of  claim 22 , in which the heatsink has a T shape cross section.  
   
   
       24 . The semiconductor package of  claim 22 , in which the mold compound uncovers the top surface of the heatsink and the bottom surface of the die pad.  
   
   
       25 . The semiconductor package of  claim 22 , further comprising leads to which the the top surface of the integrated circuit element is electrically connected via bond wires.  
   
   
       26 . The semiconductor package of  claim 25 , in which the leads have top surfaces covered by the mold compound, and bottom surfaces uncovered by the mold compound.  
   
   
       27 . The semiconductor package of  claim 22 , in which the heatsink has a side surface of which a portion is uncovered by the mold compound.  
   
   
       28 . The semiconductor package of  claim 22 , further comprising a tape material between the heatsink and the integrated circuit element.  
   
   
       29 . The semiconductor package of  claim 22 , further comprising a adhesive material between the heatsink and the integrated circuit element.  
   
   
       30 . The semiconductor package of  claim 29 , in which the adhesive material is the mold compound.  
   
   
       31 . The semiconductor package of  claim 22 , in which the bond wires are disposed on an area on the top surface of the integrated circuit element uncovered by the bottom surface of the heatsink.  
   
   
       32 . The semiconductor package of  claim 22 , in which the integrated circuit element is an integrated circuit die.