Semiconductor device with silicon dioxide layers formed using atomic layer deposition

Abstract

Improved methods are disclosed for catalyst-assisted atomic layer deposition (ALD) to form a silicon dioxide layer having superior properties on a semiconductor substrate by using a first reactant component consisting of a silicon compound having at least two silicon atoms, or using a tertiary aliphatic amine as the catalyst component, or both in combination, together with related purging methods and sequencing.

1 - 36 . (canceled)  
     
     
         37 . A semiconductor device comprising a substrate having a highly uniform, substantially impurity-free silicon dioxide thin film having enhanced silicon richness along at least a surface thereof, wherein said silicon dioxide thin film was formed by the steps of: 
 (a) loading the substrate into a chamber;    (b) supplying a first reactant, a catalyst, and optionally an inert gas to the chamber, wherein said first reactant is a silicon halide compound having at least two silicon atoms and said catalyst is selected from the group consisting of ammonia and amine;    (c) purging reaction byproducts and unreacted first reactant and catalyst from the chamber;    (d) supplying a second reactant, a catalyst, and optionally an inert gas to the chamber, wherein said second reactant is a compound having 0 components and said catalyst is selected from the group consisting of ammonia and amine;    (e) purging reaction byproducts and unreacted second reactant and catalyst from the chamber; and,    (f) repeating steps (a)-(e) until the silicon dioxide thin film reaches the desired thickness.    
     
     
         38 . A semiconductor device according to  claim 37  wherein the method of forming the silicon dioxide thin film further included the step of using a tertiary aliphatic amine as the catalyst.  
     
     
         39 . A semiconductor device according to  claim 37  wherein the first reactant was Si 2 Cl 6 .  
     
     
         40 . A method according to  claim 37  wherein said first reactant is one selected from the group consisting of Si 2 X 6 , Si 3 X 8 , Si 4 X 10 , and Si 3 X 6  (Triangle), wherein X is a halogen.  
     
     
         41 . A semiconductor device according to  claim 37  wherein said catalyst is trimethyl amine.  
     
     
         42 . A semiconductor device according to  claim 37  comprising carrying out steps (b) through (e) according to the following sequence: feeding said first reactant and catalyst to said chamber during a process time period t 1 ; purging the chamber with an inert gas during a time period t 2  immediately following period t 1 ; pumping the chamber to at least partially evacuate inert gas and other gaseous materials from the chamber during a time period t 3  immediately following period t 2 ; feeding said second reactant and catalyst to the chamber during a time period t 4  immediately following period t 3 ; purging the chamber with an inert gas during a time period t 5  immediately following period t 4 ; and, pumping the chamber to at least partially evacuate inert gas and other gaseous materials from the chamber during a time period t 6  immediately following period t 5 .  
     
     
         43 . A semiconductor device according to  claim 37  comprising carrying out steps (b) through (e) according to the following sequence: feeding said first reactant and catalyst to said chamber during a process time period t 1 ; pumping the chamber to at least partially evacuate gaseous materials from the chamber during a time period t 2  immediately following period t 1 ; purging the chamber with an inert gas during a time period t 3  immediately following period t 2 ; feeding said second reactant and catalyst to the chamber during a time period t 4  immediately following period t 3 ; pumping the chamber to at least partially evacuate gaseous materials from the chamber during a time period t 5  immediately following period t 4 ; and, purging the chamber with an inert gas during a time period t 6  immediately following period t 5 .  
     
     
         44 . A semiconductor device comprising at least a substrate having a silicon dioxide layer deposited on a surface of said substrate using a catalyst-assisted atomic layer deposition process comprising the sequential steps of exposing a functionalized surface of the substrate to a first mixture consisting essentially of first reactant and first catalyst and thereafter exposing that surface to a second mixture consisting essentially of second reactant and second catalyst to form a silicon dioxide monolayer on the substrate surface, and further comprising one or more of the following: 
 (a) using a first reactant consisting essentially of at least one member selected from the group consisting of silicon compounds having at least two silicon atoms;    (b) using a first catalyst consisting essentially of at least one member selected from the group consisting of tertiary aliphatic amine compounds; and,    (c) using a first reactant consisting essentially of at least one member selected from the group consisting of silicon compounds having at least two silicon atoms in combination with using a first catalyst consisting essentially of at least one member selected from the group consisting of tertiary aliphatic amine compounds.    
     
     
         45 . A semiconductor device according to  claim 44  wherein said first reactant used in forming said silicon dioxide layer consists essentially of a silicon-halide compound.  
     
     
         46 . A semiconductor device according to  claim 44  wherein said first catalyst used in forming said silicon dioxide layer consists essentially of a tertiary aliphatic amine compound having the general formula NR 3 , where each R represents the same or a different aliphatic group having from 1 to 5 carbon atoms.  
     
     
         47 . A semiconductor device according to  claim 44  wherein said first reactant used in forming said silicon dioxide layer consists essentially of Si 2 Cl 6  and said first catalyst used in forming said silicon dioxide layer consists essentially of trimethyl amine.  
     
     
         48 . A semiconductor device formed according to  claim 44  wherein the silicon dioxide layer deposition is carried out at a temperature ranging from about 90°-110° C.  
     
     
         49 . A semiconductor device formed according to  claim 44  wherein the silicon dioxide layer deposition is carried out at a pressure ranging from about 500 mmtorr-5 torr.  
     
     
         50 . A semiconductor device formed according to  claim 44  wherein the silicon dioxide layer deposition further includes removing unreacted reactant, catalyst and reaction byproducts from the region of the substrate surface following each reaction step.  
     
     
         51 . A semiconductor device formed according to  claim 44  wherein the silicon dioxide layer deposition further includes: (a) a first reaction period during which first reactant and catalyst are fed through respective first reactant and catalyst feed lines to the substrate surface along with inert gas fed through a second reactant feed line; (b) a first purge period during which the feeds of first reactant and catalyst are stopped and, instead, inert gas is fed through the first and second reactant and catalyst feed lines; (c) a second reaction period during which second reactant and catalyst are fed through their respective feed lines to the substrate surface along with inert gas fed through the first reactant feed line; and, (d) a second purge period during which the feeds of second reactant and catalyst are stopped and, instead, inert gas is fed through the first and second reactant and catalyst feed lines.  
     
     
         52 . A semiconductor device formed according to  claim 44 , further comprising repeating the silicon dioxide layer deposition multiple times on the same substrate to obtain a silicon dioxide thin film of a desired thickness greater than one monolayer.  
     
     
         53 . A semiconductor device formed according to  claim 44 , further comprising hardening the deposited silicon dioxide layer.  
     
     
         54 . A semiconductor device formed according to  claim 53  wherein said hardening step is selected from one of the following: 
 (a) a thermal treatment comprising annealing the silicon dioxide layer at about 300° C.-900° C. in the presence of an inert gas selected from the group consisting of N 2 , O 2 , H 2  and Ar;    (b) a plasma treatment comprising annealing the silicon dioxide layer at about 200° C.-700° C. in the presence of O 2  or H 2 ; or,    (c) an ozone treatment comprising exposing the silicon dioxide layer to O 3  at a temperature of about 25° C.-700° C.    
     
     
         55 . A substrate having a silicon dioxide thin film deposited on a surface of said substrate by the steps of: 
 (a) loading the substrate into a chamber;    (b) supplying a first reactant, a catalyst, and optionally an inert gas to the chamber, wherein said first reactant is a silicon-halide compound having at least two silicon atoms and said catalyst is selected from the group consisting of ammonia and amine;    (c) purging reaction byproducts and unreacted first reactant and catalyst from the chamber;    (d) supplying a second reactant, a catalyst, and optionally an inert gas to the chamber, wherein said second reactant is a compound having O components and said catalyst is selected from the group consisting of ammonia and amine;    (e) purging reaction byproducts and unreacted second reactant and catalyst from the chamber; and,    (f) repeating steps (a)-(e) until the silicon dioxide thin film reaches a desired thickness greater than one monolayer.    
     
     
         56 . A substrate formed according to  claim 55  wherein said first reactant is Si 2 Cl 6 .