Thermoelectric cooling for imagers

Abstract

An imager is provided with a thermoelectric cooler. The cooler is formed on the back side of the imager to thermoelectrically cool areas of the imager. The cooler removes heat from targeted regions where heat is generated and conducts the heat away from sensitive pixel array regions. Accordingly, dark current is reduced by thermoelectrically cooling the imager.

1 . An imaging device comprising: 
 a substrate having first and second sides;    a pixel array formed in a region on the first side of said substrate; and    a thermoelectric cooler formed on the second side of said substrate    
   
   
       2 . The imaging device according to  claim 1 , wherein said thermoelectric cooler covers substantially all of the second side of the substrate.  
   
   
       3 . The imaging device according to  claim 1 , wherein said thermoelectric cooler covers a portion of the second side of the substrate.  
   
   
       4 . The imaging device according to  claim 3 , wherein the portion includes a portion underneath peripheral circuitry of the device.  
   
   
       5 . The imaging device according to  claim 4 , wherein the peripheral circuitry includes an analog-to-digital converter.  
   
   
       6 . The imaging device according to  claim 3 , wherein the portion does not include a region underneath said array.  
   
   
       7 . The imaging device according to  claim 1 , wherein said thermoelectric cooler comprises a doped substrate.  
   
   
       8 . The imaging device according to  claim 7 , wherein said doped substrate includes at least one p/n junction.  
   
   
       9 . The imaging device according to  claim 1 , wherein said thermoelectric cooler comprises epitaxial silicon.  
   
   
       10 . The imaging device according to  claim 1 , wherein said thermoelectric cooler comprises silicon carbine.  
   
   
       11 . The imaging device according to  claim 1 , wherein the first side is a front side of the substrate.  
   
   
       12 . The imaging device according to  claim 1 , wherein the second side is a back side of the substrate.  
   
   
       13 . The imaging device according to  claim 1 , wherein the second side is a back side of the substrate and silicon carbine is used to build a p/n junction in the substrate.  
   
   
       14 . A CMOS imager integrated circuit comprising: 
 an imaging device including: 
 a substrate having first and second sides;  
 at least one first doped layer formed on the first side of said substrate;  
 a thermoelectric cooler formed on the second side of said substrate;  
 an array of pixel sensor cells formed in said doped layer; and  
 peripheral circuitry formed in said substrate on the first side of said substrate.  
   
   
   
       15 . The integrated circuit of  claim 14 , wherein said thermoelectric cooler covers substantially all of the second side of the substrate.  
   
   
       16 . The integrated circuit of  claim 14 , wherein said thermoelectric cooler covers a portion of the second side of the substrate, the portion being underneath said peripheral circuitry.  
   
   
       17 . A CMOS imager integrated circuit comprising: 
 an imaging device including: 
 a substrate having a front side and a back side;  
 at least one first doped layer formed on the front first side of the substrate;  
 a layer of silicon carbine formed on the back side of said substrate;  
 an array of pixel sensor cells formed in said doped layer; and  
 peripheral circuitry formed in said substrate on the front side of said substrate.  
   
   
   
       18 . A processing system comprising: 
 a processor; and    an imager coupled to said processor, said imager comprising:    a substrate having first and second sides;    a pixel array formed on the first side of said substrate, said array having a doped layer;    peripheral circuitry formed in said substrate on the first side of substrate adjacent said array; and    a thermoelectric cooler formed on the second side of said substrate.    
   
   
       19 . The system according to  claim 18 , wherein said thermoelectric cooler covers substantially all of the second side of the substrate.  
   
   
       20 . The system according to  claim 18 , wherein said thermoelectric cooler covers a portion of the second side of the substrate.  
   
   
       21 . The system according to  claim 20 , wherein the portion includes a portion underneath said peripheral circuitry.  
   
   
       22 . The system according to  claim 21 , wherein the peripheral circuitry includes an analog-to-digital converter.  
   
   
       23 . The system according to  claim 20 , wherein the portion does not include a region underneath said array.  
   
   
       24 . The system according to  claim 18 , wherein said thermoelectric cooler comprises a doped substrate.  
   
   
       25 . The system according to  claim 24 , wherein said doped layer includes at least one p/n junction.  
   
   
       26 . The system according to  claim 18 , wherein said thermoelectric cooler comprises epitaxial silicon.  
   
   
       27 . The system according to  claim 18 , wherein said thermoelectric cooler comprises silicon carbine.  
   
   
       28 . The system according to  claim 18 , wherein the first side is a front side of the substrate.  
   
   
       29 . The system according to  claim 18 , wherein the second side is a back side of the substrate.  
   
   
       30 . The system according to  claim 18 , wherein the second side is a back side of the substrate and silicon carbine is used to build a p/n junction in the substrate.  
   
   
       31 . A method for forming an imaging device comprising: 
 forming at least one doped layer in a substrate on a first surface of the imaging device; and    forming a thermoelectric cooler in a substrate on a second surface of the imaging device; and    forming an array of pixel sensor cells, peripheral transistors and signal processing circuitry in said doped layer on the first side of said imaging device in an area over the thermoelectric cooler.    
   
   
       32 . The method according to  claim 31 , wherein said thermoelectric cooler covers substantially all of the second side of the substrate.  
   
   
       33 . The method according to  claim 31 , wherein said thermoelectric cooler covers a portion of the second side of the substrate.  
   
   
       34 . The method according to  claim 31 , wherein the portion of the imaging device includes a portion underneath said peripheral circuitry.  
   
   
       35 . The method according to  claim 34 , wherein the peripheral circuitry includes an analog-to-digital converter.  
   
   
       36 . The method according to  claim 35 , wherein the portion does not include a region comprising said array.  
   
   
       37 . The method according to  claim 31 , wherein said thermoelectric cooler comprises a doped substrate.  
   
   
       38 . The method according to  claim 37 , wherein said doped substrate includes at least one p/n junction.  
   
   
       39 . The method according to  claim 31 , wherein said thermoelectric cooler comprises epitaxial silicon.  
   
   
       40 . The method according to  claim 31 , wherein said thermoelectric cooler comprises silicon carbine.  
   
   
       41 . A method of operating a semiconductor imaging device comprising: 
 generating digital information within a pixel; and    creating a Peltier effect to remove heat from the pixel.    
   
   
       42 . A method of making semiconductor imaging devices comprising the acts of: 
 locating cooler elements on a back side of a wafer; and    subsequently, forming pixel elements on a front side of said wafer.    
   
   
       43 . The method of claim of  claim 42 , wherein the cooler elements include p/n junctions.  
   
   
       44 . A method of making a semiconductor imaging device comprising the acts of: 
 providing a wafer;    covering a front side of the wafer with a first insulator;    growing an epitaxial silicon carbine film on a back side of the wafer;    encapsulating the silicon carbine film with a second insulator;    removing the first insulator;    performing front side processing to form front side components of the imaging device;    removing the second insulator; and    bonding the back side of the wafer to a heat sink.    
   
   
       45 . The method of  claim 44  wherein a thickness of the silicon carbine film is between approximately 2000 Å to approximately 10000 Å thick.  
   
   
       46 . The method of  claim 44  wherein a thickness of the silicon carbine film is approximately 5000 Å.