US2006049464A1PendingUtilityA1

Semiconductor devices with graded dopant regions

Assignee: RAO G R MOHANPriority: Sep 3, 2004Filed: Sep 3, 2004Published: Mar 9, 2006
Est. expirySep 3, 2024(expired)· nominal 20-yr term from priority
Inventors:G.R. Mohan Rao
H10D 89/211H10D 62/60H10D 12/441H10F 39/18H10D 62/393H10B 41/35H10B 12/01H10B 41/30
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Claims

Abstract

Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICS, improvement in refresh time for DRAM's, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFET's, and a host of other applications.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device with graded dopant concentration in the active region, to aid carrier movement from emitter to collector.  
   
   
       2 . A semiconductor device with graded dopant concentration in the active region, to aid carrier movement from source to drain.  
   
   
       3 . A semiconductor device with graded dopant concentration in the well regions, to aid carrier movement away from the active surface regions, towards the substrate.  
   
   
       4 . A semiconductor device with graded dopant concentration in the substrate region to aid carrier movement away from the active surface regions, deeper towards the substrate.  
   
   
       5 . A semiconductor device with at least one graded dopant concentration of donor or acceptor, to aid or impede carrier movement in selected regions in the monolithic die.  
   
   
       6 . A semiconductor device with at least one each of dopant concentration of both donor and acceptor, to optimize the operating performance of the device.  
   
   
       7 . A semiconductor device with at least one graded dopant concentration fabricated with ion implantation, to provide an aiding or retarding electric field locally in a monolithic integrated circuit.  
   
   
       8 . A semiconductor device with at least one graded dopant concentration in an epitaxial layer.  
   
   
       9 . A semiconductor device where one layer of dopant from one wafer, is transferred to another wafer having either same polarity or different polarity dopant through wafer bonding or similar processes.

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