High efficiency power conversion circuits

Abstract

A composite high voltage schottky rectifier is revealed that provides a forward voltage slightly larger than a low voltage schottky rectifier combined with a high voltage breakdown capability. The composite rectifier can be formed from the combination of a low voltage schottky rectifier, a high voltage mosfet, and a few small passive components. A quarter bridge primary switching network similar in some ways to a half bridge primary switching network is revealed. The quarter bridge network consists of four switches with voltage stress equal to half the line voltage and the network applies one quarter of the line voltage to a primary magnetic circuit element network thereby reducing the number of primary winding turns required to one quarter by comparison to a common full bridge network. A synchronously switched buck post regulator is revealed for multi-output forward converters. The synchronously switched buck post regulator accomplishes precise independent load regulation for each output and reduced magnetics volume by using a coupled inductor with a common core for all outputs plus a second smaller inductor for each output except the highest voltage output. An improved capacitor coupled floating gate drive circuit is revealed that provides an effective drive mechanism for a floating or high side switch without the use of level shifting circuits or magnetic coupling. The capacitor coupled floating gate drive circuit is an improvement over prior art capacitor coupled floating gate drive circuits in that the new circuit uses a positive current feedback mechanism to reject slowly changing voltage variations that cause unintentional switch state changes in prior art capacitor coupled floating gate drive circuits.

1 . A composite high voltage schottky rectifier having an anode terminal and a cathode terminal comprising, 
 a schottky diode having an anode terminal connected to said anode terminal of said composite high voltage schottky diode and having a cathode terminal,    a high voltage N channel power mosfet having a source terminal connected to said cathode terminal of said schottky diode, a drain terminal connected to said cathode terminal of said composite high voltage schottky diode, and a gate terminal,    a source of dc potential having a positive terminal connected to said gate terminal of said high voltage N channel power mosfet and having a negative terminal connected to said anode terminal of said schottky diode,    whereby said composite high voltage schottky diode accomplishes both high reverse voltage greater than, but substantially equal to, the breakdown voltage of said high voltage N channel power mosfet and a forward voltage drop substantially less than a junction rectifier thereby achieving higher efficiency than a high voltage junction rectifier.    
   
   
       2 . The composite high voltage schottky rectifier of  claim 1  further comprising, 
 a capacitor having a terminal connected to said cathode terminal of said schottky diode.    
   
   
       3 . The composite high voltage schottky rectifier of  claim 1  integrated onto a single die.  
   
   
       4 . A secondary side buck post regulator for a second output of a multi-output forward converter comprising, 
 a first coupled inductor having a first winding and a second winding with an undotted terminal of said first winding connected to a first output of said multi-output forward converter and with said second winding connected in series with said second output of said multi-output forward converter,    a second inductor connected in series with said second winding of said first coupled inductor,    first switch means having a drain terminal connected to a dotted terminal of said first winding of said first coupled inductor,    second switch means, operable substantially in anti-synchronization to said first switch means, having a source terminal connected to an output terminal, which is common to said first output and to said second output of said multi-output forward converter and having a drain terminal connected to a source terminal of said first switch means and connected to a series winding network comprising said second inductor and said second winding of said first coupled inductor,    whereby said secondary side buck post regulator provides a second precisely regulated output with reduced magnetics volume and cost.    
   
   
       5 . A capacitor coupled floating gate drive circuit comprising, 
 an alternating source of voltage having two operating voltage states separated by a substantially fixed dc voltage difference and having at least a first terminal and a second terminal with said first terminal of said alternating source of voltage connected to a first reference voltage having a substantially fixed dc voltage difference to one of said operating voltage states of said alternating source of voltage.    a capacitor having two terminals with said first terminal of said capacitor coupled to said second terminal of said alternating source of voltage,    a digital logic and drive circuit having at least a first input terminal, a first output terminal, a second output terminal coupleable to a gate terminal of a mosfet, a first supply voltage terminal, and a reference terminal coupleable to a source terminal of said mosfet, wherein the voltage signal appearing at said first output terminal is substantially in synchronization with the voltage applied at said first input terminal and the voltage signal appearing at said second output terminal is substantially in anti-synchronization to the voltage applied at said first input terminal,    a first clamp diode having an anode terminal and a cathode terminal with said anode terminal of said first clamp diode connected to said first input terminal of said digital logic and drive circuit and said cathode terminal of said first clamp diode connected to said first supply voltage terminal of said digital logic and drive circuit,    a second clamp diode having an anode terminal and a cathode terminal with said cathode terminal of said second clamp diode connected to said first input terminal of said digital logic and drive circuit and said anode terminal of said second clamp diode connected to said reference terminal of said digital logic and drive circuit,    a first resistor having two terminals with said first terminal of said first resistor coupled to said second terminal of said capacitor and with said second terminal of said first resistor coupled to said first input terminal of said digital logic and drive circuit,    a second resistor having two terminals with said first terminal of said second resistor coupled to said first output of said digital logic and drive circuit and said second terminal of said second resistor coupled to said second terminal of said capacitor,    whereby said first resistor provides current limiting to protect said first and second clamp diodes from over current associated with quickly varying applied voltage changes to said capacitor, said second resistor provides positive current feedback for rejecting capacitor currents associated with slowly varying applied voltage changes to said capacitor, and said digital logic and drive circuit provides an output signal at said second output terminal, which is substantially in anti-synchronization to said alternating source of voltage applied at said first terminal of said capacitor, for enhancing said gate of said mosfet.    
   
   
       6 . The capacitor coupled floating gate drive circuit of  claim 5  wherein said first input of said digital logic and drive circuit is a Schmitt trigger input.  
   
   
       7 . The capacitor coupled floating gate drive circuit of  claim 5  wherein said clamp diodes are integrated into said digital logic and drive circuit.  
   
   
       8 . A quarter bridge switching network comprising, 
 an input coupleable to a source of dc power having a positive terminal and a negative terminal,    an output coupleable to a winding network having first and second terminals,    a first capacitor leg comprising, 
 a first capacitor having first and second terminals with said first terminal of said first capacitor connected to said positive terminal of said input,  
 a second capacitor having a first terminal and a second terminal with said first terminal of said second capacitor connected to said second terminal of said first capacitor and with said second terminal of said second capacitor connected to said negative terminal of said input,  
   a first switch leg comprising, 
 first switch means having first and second terminals with said first terminal of said first switch means connected to said positive terminal of said input,  
 second switch means having first and second terminals with said first terminal of said second switch means connected to said second terminal of said first switch means and with said second terminal of said second switch means connected to said second terminal of said first capacitor,  
 third switch means having first and second terminals, operable substantially in synchronization with said first switch means, with said first terminal of said third switch means connected to said second terminal of said second switch means,  
 fourth switch means having first and second terminals, operable substantially in synchronization with said second switch means, with said first terminal of said fourth switch means connected to said second terminal of said third switch means and with said second terminal of said fourth switch means connected to said negative terminal of said input,  
   a second capacitor leg comprising, 
 a third capacitor having first and second terminals with said first terminal of said third capacitor connected to said second terminal of said first switch means,  
 a fourth capacitor having first and second terminals with said first terminal of said fourth capacitor connected to said second terminal of said third capacitor and with said second terminal of said fourth capacitor connected to said second terminal of said third switch means,  
 whereby an ac voltage of peak value substantially equal to one quarter of the voltage of said source of dc power connected at said input is created between said second terminal of said first capacitor and said second terminal of said third capacitor.  
   
   
   
       9 . The quarter bridge switching network of  claim 8  wherein said first terminal of said output is connected to said second terminal of said first capacitor and said second terminal of said output is connected to said second terminal of said third capacitor.  
   
   
       10 . The quarter bridge switching network of  claim 8  further comprising four composite high voltage schottky rectifiers of  claim 1 , with one composite high voltage schottky rectifier in parallel with each of said four switch means, whereby said composite high voltage schottky rectifier eliminates body diode conduction in each of said four switch means.  
   
   
       11 . The quarter bridge switching network of  claim 8  applied to a forward converter having multiple outputs with one of said multiple outputs employing said secondary side post regulator of  claim 4 .  
   
   
       12 . The quarter bridge switching network of  claim 8  further comprising three of said capacitor coupled floating gate drive circuits of  claim 5  for driving said first, second, and third switch means.  
   
   
       13 . An eighth bridge switching network comprising the quarter bridge switching network of  claim 8  and further comprising, 
 a second switch leg comprising, 
 fifth switch means having first and second terminals, operable substantially in synchronization with said first switch means, with said first terminal of said fifth switch means connected to said second terminal of said first switch means,  
 sixth switch means having first and second terminals, operable substantially in synchronization with said second switch means, with said first terminal of said sixth switch means connected to said second terminal of said fifth switch means and with said second terminal of said sixth switch means connected to said second terminal of said third capacitor,  
 seventh switch means having first and second terminals, operable substantially in synchronization with said first switch means, with said first terminal of said seventh switch means connected to said second terminal of said sixth switch means,  
 eighth switch means having first and second terminals, operable substantially in synchronization with said second switch means, with said first terminal of said eighth switch means connected to said second terminal of said seventh switch means and with said second terminal of said eighth switch means connected to said second terminal of said fourth capacitor,  
   a third capacitor leg comprising, 
 a fifth capacitor having first and second terminals with said first terminal of said fifth capacitor connected to said second terminal of said fifth switch means,  
 a sixth capacitor having first and second terminals with said first terminal of said sixth capacitor connected to said second terminal of said fifth capacitor and with said second terminal of said sixth capacitor connected to said second terminal of said seventh switch means,  
 whereby an ac voltage of peak value substantially equal to one eighth of the voltage of said source of dc power connected at said input is applied to said winding network connected at said output by action of said switch means.  
   
   
   
       14 . The eighth bridge switching network of  claim 13  wherein said first terminal of said output is connected to said second terminal of said third capacitor and said second terminal of said output is connected to said second terminal of said fifth capacitor.  
   
   
       15 . An eighth bridge switching network comprising the quarter bridge switching network of  claim 8  and further comprising, 
 a second switch leg comprising, 
 fifth switch means having first and second terminals, operable substantially in synchronization with said second switch means, with said first terminal of said fifth switch means connected to said second terminal of said first switch means,  
 sixth switch means having first and second terminals, operable substantially in synchronization with said first switch means, with said first terminal of said sixth switch means connected to said second terminal of said fifth switch means and with said second terminal of said sixth switch means connected to said second terminal of said third capacitor,  
 seventh switch means having first and second terminals, operable substantially in synchronization with said second switch means, with said first terminal of said seventh switch means connected to said second terminal of said sixth switch means,  
 eighth switch means having first and second terminals, operable substantially in synchronization with said first switch means, with said first terminal of said eighth switch means connected to said second terminal of said seventh switch means and with said second terminal of said eighth switch means connected to said second terminal of said fourth capacitor,  
   a third capacitor leg comprising, 
 a fifth capacitor having first and second terminals with said first terminal of said fifth capacitor connected to said second terminal of said fifth switch means,  
 a sixth capacitor having first and second terminals with said first terminal of said sixth capacitor connected to said second terminal of said fifth capacitor and with said second terminal of said sixth capacitor connected to said second terminal of said seventh switch means,  
 whereby an ac voltage of peak value substantially equal to one eighth of the voltage of said source of dc power connected at said input is applied to said winding network connected at said output by action of said switch means.  
   
   
   
       16 . The eighth bridge switching network of  claim 15  wherein said first terminal of said output is connected to said second terminal of said third capacitor and said second terminal of said output is connected to said second terminal of said fifth capacitor.  
   
   
       17 . The eighth bridge switching network of  claim 15  wherein said first terminal of said output is connected to said second terminal of said first capacitor and said second terminal of said output is connected to said second terminal of said fifth capacitor.