Semiconductor device and method for manufacturing the same

Abstract

Disclosed is a semiconductor device comprising an underlying insulating film having a depression, a semiconductor structure which includes a first semiconductor portion having a portion formed on the underlying insulating film and a first overlap portion which overlaps the depression, a second semiconductor portion having a portion formed on the underlying insulating film and a second overlap portion which overlaps the depression, and a third semiconductor portion disposed between the first and second semiconductor portions and having a portion disposed above the depression, wherein overlap width of the first overlap portion and overlap width of the second overlap portion are equal to each other, a gate electrode including a first electrode portion covering upper and side surfaces of the third semiconductor portion and a second electrode portion formed in the depression, and a gate insulating film interposed between the semiconductor structure and the gate electrode.

1 - 11 . (canceled)  
     
     
         12 . A method of manufacturing a semiconductor device comprising: 
 forming a semiconductor structure which includes a first semiconductor portion, a second semiconductor portion and a third semiconductor portion disposed between the first and second semiconductor portions, on an underlying insulating film;    forming a dummy structure covering upper and side surfaces of the third semiconductor portion;    forming an insulating portion covering a surface of the first semiconductor portion, a surface of the second semiconductor portion and a side surface of the dummy structure;    removing the dummy structure to expose the third semiconductor portion and the underlying insulating film under the dummy structure;    forming a depression in the underlying insulating film by etching an exposed portion and a portion adjacent to the exposed portion of the underlying insulating film; and    forming a gate electrode with a gate insulating film interposed between the third semiconductor portion and the gate electrode, the gate electrode including a first electrode portion covering upper and side surfaces of the third semiconductor portion and a second electrode portion formed in the depression.    
     
     
         13 . The method according to  claim 12 , wherein the second electrode portion entirely covers a lower surface of the third semiconductor portion.  
     
     
         14 . The method according to  claim 12 , wherein the second electrode portion partly covers a lower surface of the third semiconductor portion.  
     
     
         15 . The method according to  claim 12 , further comprising introducing an impurity element for source/drain into the first and second semiconductor portions.  
     
     
         16 . The method according to  claim 12 , wherein the underlying insulating film is isotropically etched in forming the depression in the underlying insulating film.