US2006121635A1PendingUtilityA1

Lids for wafer-scale optoelectronic packages

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Assignee: GALLUP KENDRA JPriority: Jun 24, 2004Filed: Jan 18, 2006Published: Jun 8, 2006
Est. expiryJun 24, 2024(expired)· nominal 20-yr term from priority
H10W 90/734H10H 20/8506H01S 5/02251H01S 5/02208G02B 6/4277H01S 5/02255G02B 6/4214
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Claims

Abstract

A method for forming a lid for a wafer-scale package includes (1) forming a cavity in a substrate, (2) forming an oxide layer over the cavity and over a bond area around the cavity on the substrate, (3) forming a reflective layer over the oxide layer, (4) forming a barrier layer over the reflective layer, (5) etching a portion of the barrier layer down to a portion of the reflective layer over the bond area, and (6) forming a solder layer on the portion of the reflective layer. The reflective layer can be a titanium-platinum-gold metal stack and the barrier layer can be a titanium dioxide layer.

Claims

exact text as granted — not AI-modified
1 . A method for forming a lid for a wafer-scale package, comprising: 
 forming a cavity in a substrate;    forming an oxide layer over the cavity and over a bond area around the cavity on the wafer;    forming a reflective layer over the oxide layer;    forming a barrier layer over the reflective layer;    etching a portion of the barrier layer down to a portion of the reflective layer over the bond area; and    forming a solder layer on the portion of the reflective layer.    
   
   
       2 . The method of  claim 1 , wherein said. forming a cavity in the substrate comprises anisotropically etching the substrate to form the cavity, the substrate comprising a first crystallographic plane at an offset from a wafer top surface and the cavity comprising a surface along a second crystallographic plane.  
   
   
       3 . The method of  claim 2 , wherein the first crystallographic plane is oriented so that the second crystallographic plane is oriented 45° from a normal to the wafer top surface and said anisotropic etching comprises a wet etch using a KOH solution.  
   
   
       4 . The method of  claim 1 , wherein said forming an oxide layer comprises thermally growing the oxide layer.  
   
   
       5 . The method of  claim 1 , wherein said fonning a reflective layer comprises forming a metal stack layer.  
   
   
       6 . The method of  claim 5 , wherein said forming a barrier layer comprises thermally depositing a metal oxide layer upon the metal stack layer.  
   
   
       7 . The method of  claim 6 , wherein the metal stack layer comprises a titanium layer, a platinum layer atop the titanium layer, and a gold layer atop the platinum layer, and the metal oxide layer comprises a titanium dioxide layer.  
   
   
       8 . The method of  claim 7 , wherein said etching a portion of the barrier layer comprises a wet etch using a diluted HF and nitric acid solution.  
   
   
       9 . The method of  claim 5 , wherein said forming a barrier layer comprises a method selected from the group consisting of thermally depositing, sputtering, reactive sputtering, chemical vapor deposition, and plasma enhanced chemical vapor deposition.  
   
   
       10 . The method of  claim 9 , wherein the barrier layer is selected from the group consisting of nitride, boride, fluoride, fluorocarbon, and polyimide.  
   
   
       11 . The method of  claim 1 , wherein said forming a solder layer comprises plating the solder layer on the portion of the reflective layer.  
   
   
       12 . The method of  claim 1 , wherein said etching a portion of the barrier layer comprises: 
 patterning a photoresist layer over the barrier layer to form a window over the portion of the reflective layer; and    etching the portion of the barrier layer exposed by the window.    
   
   
       13 . The method of  claim 12 , further comprising stripping the photoresist after said forming the solder layer on the portion of the reflective layer.  
   
   
       14 . The method of  claim 12 , further comprising stripping the photoresist prior to said forming the solder layer on the portion of the reflective layer.  
   
   
       15 . The method of  claim 1 , wherein said solder layer comprises a gold-tin solder.

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