US2006128061A1PendingUtilityA1
Fabrication of stacked die and structures formed thereby
Est. expiryOct 4, 2024(expired)· nominal 20-yr term from priority
H10W 72/07337H10W 72/30H10W 90/00
44
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
Methods of forming a microelectronic structure are described. Those methods comprise forming a bond between a non-device side of a first die and a non-device side of a second die, wherein forming the bond between the non-device side of the first die and the non-device side of the second die does not comprise using an interfacial glue.
Claims
exact text as granted — not AI-modified1 . A method of forming a microelectronic structure comprising;
forming a bond between a non-device side of a first individual die and a non-device side of a second individual die, wherein forming the bond between the non-device side of the first individual die and the non-device side of the second individual die does not comprise using an interfacial glue.
2 . The method of claim 1 wherein forming a bond comprises forming a silicon to silicon bond comprising Van der Waal forces.
3 . The method of claim 1 wherein forming a bond comprises:
bringing the non-device side of the first individual die and the non-device side of the second individual die in contact with each other; and heating the non-device side of the first individual die and the non-device side of the second individual die to a temperature between about 250 to about 450 degrees Celsius.
4 . The method of claim 1 wherein not using an interfacial glue comprises not using an interfacial glue selected from the group consisting of solder, organic adhesives and polymer adhesives.
5 . The method of claim 1 wherein the non-device side of the first individual die and the non-device side of the second individual die are thinned prior to forming the bond.
6 . The method of claim 5 wherein the non-device side of the first individual die and the non-device side of the second individual die are thinned to a thickness of about 50 microns to about 100 microns prior to forming the bond.
7 . The method of claim 5 wherein the non-device side of the first individual die and the non-device side of the second individual die are thinned by at least one of polishing or grinding.
8 . A method of forming a microelectronic structure comprising:
thinning a non-device portion of a wafer, wherein the wafer comprises a plurality of die; separating the wafer into a plurality of individual die; bringing the non-device side of a first individual die and the non-device side of a second individual die into contact with each other; and forming a bond between the non-device side of the first individual die and the non-device side of the second individual die without using an interfacial glue.
9 . The method of claim 8 wherein forming a bond comprises heating the non-device side of the first individual die and the non-device side of the second individual die to a temperature between about 250 to about 450 degrees Celsius.
10 . The method of claim 8 wherein without using an interfacial glue comprises without using an interfacial glue selected from the group consisting of solder, organic adhesives and polymer adhesives.
11 . The method of claim 8 wherein separating the wafer comprises sawing the wafer.
12 . The method of claim 8 further comprising attaching a first land grid array to a device side of the first individual die and a second land grid array to a device side of the second individual die.
13 . The method of claim 12 wherein attaching a first land grid array to the device side of the first individual die and a second land grid array to the device side of the second individual die comprises attaching a first organic land grid array to the device side of the first individual die and a second organic land grid array to the device side of the second individual die.Join the waitlist — get patent alerts
Track US2006128061A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.