Materials and methods for forming hybrid organic-inorganic dielectric materials for integrated circuit applications
Abstract
An integrated circuit is provided comprising a substrate and discrete areas of electrically insulating and electrically conductive material, wherein the electrically insulating material is a hybrid organic-inorganic material that has a density of 1.45 g/cm 3 or more and a dielectric constant of 3.0 or less. The integrated circuit can be made by a method comprising: providing a substrate; forming discrete areas of electrically insulating and electrically conductive material on the substrate; wherein the electrically insulating material is deposited on the substrate followed by heating at a temperature of 350° C. or less; and wherein the electrically insulating material is a hybrid organic-inorganic material that has a density of 1.45 g/cm 3 or more after densification. Also disclosed is a a method for making an integrated circuit comprising performing a dual damascene method with an electrically conductive material and a dielectric, the dielectric being a directly photopatterned hybrid organic-inorganic material.
Claims
exact text as granted — not AI-modified1 . An integrated circuit device comprising a substrate and discrete areas of electrically insulating and electrically conductive material, wherein the electrically insulating material is a hybrid organic-inorganic material that has a density of 1.45 g/cm 3 or more and a dielectric constant of 3.0 or less.
2 . The integrated circuit device of claim 1 , wherein the hybrid material is a spin coated material.
3 . The integrated circuit device of claim 2 , wherein the hybrid material is a poly(organosiloxane).
4 . The integrated circuit device of claim 2 , wherein the hybrid material has a dielectric constant of 2.7 or less.
5 . The integrated circuit device of claim 1 , wherein the deposited hybrid material has a glass transition temperature of 200° C. or more.
6 . The integrated circuit device of claim 1 , wherein the hybrid layer has a dielectric constant of 2.5 or less.
7 . The integrated circuit device of claim 1 , wherein the hybrid material has a repeating -M-O-M-O— back-bone having an organic substituent bound to the backbone, the material having a molecular weight of from 500 to 100,000, where M is silicon and O is oxygen.
8 . The integrated circuit device of claim 7 , wherein the molecular weight is from 1500 to 30,000.
9 . The integrated circuit device of claim 8 , wherein the organic substituent is fully fluorinated.
10 . The integrated circuit device of claim 9 , wherein more than one different organic substituent is bound to the repeating -M-O-M-O— backbone, and wherein each organic substituent is fully or partially fluorinated.
11 . The integrated circuit device of claim 10 , wherein the hybrid material comprises organic cross linking groups between adjacent -M-O-M-O— strands.
12 . The integrated circuit device of claim 11 , wherein the organic cross linking groups are fully or partially fluorinated cyclobutane groups.
13 . The integrated circuit device of claim 12 , wherein the organic cross linking groups are perfluorinated groups.
14 . The integrated circuit device of claim 7 , wherein the organic substitutent is a single or multi ring aryl group or an alkyl group having from 1 to 4 carbons.
15 . The integrated circuit device of claim 14 , wherein the aryl or alkyl group is fluorinated or deuterated.
16 . The integrated circuit device of claim 15 , wherein the aryl or alkyl group is fluorinated.
17 . The integrated circuit device of claim 16 , wherein the organic substituent is a phenyl or fluorinated alkyl group having from 1 to 5 carbon atoms.
18 . The integrated circuit device of claim 17 , wherein the phenyl group is substituted with fluorinated methyl, ethyl or alkenyl groups.
19 . The integrated circuit device of claim 18 , wherein the hybrid material comprises a silicon oxide back-bone.
20 . The integrated circuit device of claim 19 , wherein the hybrid material comprises aryl substituents on the silicon oxide backbone.
21 . The integrated circuit device of claim 19 , wherein the hybrid material comprises alkyl substituents having from 1 to 4 carbons.
22 . The integrated circuit device of claim 17 , wherein the hybrid material comprises cyclobutane groups connecting adjacent silicon oxide strands in a three dimensional network.
23 . The integrated circuit device of claim 22 , wherein the hybrid material comprises methyl and phenyl groups.
24 . The integrated circuit device of claim 12 , wherein M is Si.
25 . The integrated circuit device of claim 22 , wherein the material is mixed with a solvent and a thermal initiator or photoinitiator prior to deposition.
26 . The integrated circuit device of claim 25 , wherein a photoinitiator is mixed with the material and solvent prior to spin on, the photoinitiator undergoing free radical formation when exposed to light so as to cause polymerization in the hybrid material.
27 . The integrated circuit device of claim 20 , wherein the electromagnetic energy is ultraviolet light.
28 . The integrated circuit device of claim 27 , wherein the ultraviolet light is directed on the hybrid layer via a mask so as to expose portions of the hybrid layer, and wherein the developer removes non-exposed portions of the hybrid layer.
29 . The integrated circuit device of claim 7 , wherein the hybrid material comprises fluorinated cross linking groups between M elements in a three dimensional -M-O-M-O— lattice.
30 . The integrated circuit device of claim 29 , wherein the organic cross linking groups are fully fluorinated.
31 . The integrated circuit device of claim 7 , comprising three or more different organic groups bound to the -M-O-M-O backbone.
32 . The integrated circuit device of claim 1 , wherein the hybrid material is a siloxane.
33 . The integrated circuit device of claim 7 , wherein the hybrid material comprises between 2 and 6 different organic substituents on an inorganic three dimensional backbone matrix.
34 . The integrated circuit device of claim 29 , wherein the repeating -M-O-M-O backbone is a three dimensional matrix.
35 . The integrated circuit device of claim 1 , wherein the material of the hybrid layer is hydrophobic and results, if exposed to water, in a water contact angle of 90 degrees or more.
36 . The integrated circuit device of claim 1 , wherein the substrate is a glass, quartz, semiconductor, ceramic or plastic substrate.
37 . The integrated circuit device of claim 1 , wherein the hybrid material is a result of chlorosilane precursors being hydrolyzed and condensed.
38 . The integrated circuit device of claim 36 , wherein the substrate is a silicon or germanium substrate.
39 . The integrated circuit device of claim 1 , wherein the deposited hybrid material is capable of being heated in supercritical water vapor at 2 atm and at 120 C. for 2 hours without degradation.
40 . The integrated circuit device of claim 1 , wherein the hybrid material is a directly patterned material with an aspect ratio of at least 2:1.
41 . The integrated circuit device of claim 1 , wherein the hybrid material is perfluorinated.
42 . The integrated circuit device of claim 1 , wherein the hybrid material is comprised of less than 10% H.
43 . The integrated circuit device of claim 42 , wherein the hybrid material is comprised of less than 5% H.
44 . The integrated circuit device of claim 1 , wherein the hybrid material is patterned to form apertures and/or ridges having a feature size of 100 nm or less.
45 . The integrated circuit device of claim 44 , wherein the hybrid material has apertures and/or ridges having a feature size of 50 nm or less.
46 . The integrated circuit device of claim 1 , wherein the electrically conductive areas comprise aluminum.
47 . The integrated circuit device of claim 1 , wherein the electrically conductive areas comprise copper.
48 . The integrated circuit device of claim 1 , wherein the integrated circuit device is part of a copper damascene process.
49 . The integrated circuit device of claim 1 , wherein the hybrid material comprises organic cross linking groups.
50 . The integrated circuit device of claim 49 , wherein the hybrid material is a chemically mechanically polished material.
51 . The integrated circuit device of claim 49 , comprising at least 4 layers, each layer comprising alternating regions of the hybrid material and an electrically conductive material.
52 . The integrated circuit device of claim 1 , that is within a computer controller.
53 . A computer comprising the integrated circuit device of claim 1.Cited by (0)
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