Graphics processor with integrated wireless circuits

Abstract

Circuits, methods, and apparatus that are capable of processing graphics information and wirelessly transmitting processed graphics information to a monitor. In order to achieve a high bandwidth, one embodiment of the present invention provides a graphics processor chip that includes multiple RF transmitters such that processed graphics information can be transmitted using the cumulative bandwidth of multiple wireless channels. These transmitters can use one or more RF standards or proprietary signaling schemes.

1 . An integrated circuit comprising: 
 a graphics processing circuit configured to receive graphics information, generate processed graphics information, and provide the processed graphics information in at least a first portion and a second portion;    a first wireless transmitter coupled to the graphics processing circuit and configured to receive the first portion of the processed graphics information and transmit the first portion of the processed graphics information; and    a second wireless transmitter coupled to the graphics processing circuit and configured to receive the second portion of the processed graphics information and transmit the second portion of the processed graphics information.    
     
     
         2 . The integrated circuit of  claim 1  further comprising: 
 a graphics output circuit coupled the graphics processing circuit and configured to provide the processed graphics information via a conductor.    
     
     
         3 . The integrated circuit of  claim 1  wherein the wireless transmitter is compliant with an RF standard.  
     
     
         4 . The integrated circuit of  claim 1  wherein the first wireless transmitter is further configured to modulate the first portion of the processed graphics information with an RF carrier according to an RF standard.  
     
     
         5 . The integrated circuit of  claim 4  wherein the RF standard is one of the group consisting of IEEE 802.11a, IEEE 802.11b, IEEE 802.11g, Bluetooth, or Ultra Wideband Wireless.  
     
     
         6 . The integrated circuit of  claim 4  wherein the graphics processing circuit is configured to scramble the processed graphics information as part of its processing.  
     
     
         7 . The integrated circuit of  claim 6  wherein the graphics processing circuit is configured to receive graphics information from a CPU.  
     
     
         8 . A method of processing and transmitting graphics information comprising: 
 receiving graphics information using a graphics processor on an integrated circuit;    processing the graphics information using the graphics processor on the integrated circuit;    dividing the processed graphics information into at least a first portion and a second portion;    transmitting the first portion of the processed graphics information as a first RF signal; and    transmitting the second portion of the processed graphics information as a second RF signal.    
     
     
         9 . The method of  claim 8  wherein the first RF signal is compliant with an RF standard.  
     
     
         10 . The method of  claim 9  wherein the RF standard is one of the group consisting of IEEE 802.11a, IEEE 802.11b , IEEE 802.11g, and Bluetooth.  
     
     
         11 . A computer system comprising: 
 a first integrated circuit comprising: 
 a graphics processing circuit configured to receive graphics information, generate processed graphics information, and provide the processed graphics information in at least a first portion and a second portion;  
 a first wireless transmitter coupled to the graphics processing circuit and configured to receive and modulate the first portion of the processed graphics information and transmit the first portion of the processed graphics information as a first RF signal; and  
 a second wireless transmitter coupled to the graphics processing circuit and configured to receive and modulate the second portion of the processed graphics information and transmit the second portion of the processed graphics information as a second RF signal; and  
   a second integrated circuit comprising: 
 a first wireless receiver configured to receive and demodulate the first RF signal and provide the first portion of the processed graphics information;  
 a second wireless receiver configured to receive and demodulate the second RF signal and provide the second portion of the processed graphics information; and  
 an output circuit configured to receive the first and second portions of the processed graphics information and provide a first output.  
   
     
     
         12 . The computer system of  claim 11  further comprising: 
 a monitor configured to receive the first output from the second integrated circuit;    a computer configured to provide graphics information to the first integrated circuit.    
     
     
         13 . The computer system of  claim 11  wherein the first integrated circuit further comprises: 
 a third wireless transmitter coupled to the graphics processing circuit and configured to receive and modulate a third portion of the processed graphics information and transmit the third portion of the processed graphics information as a third RF signal; and    a fourth wireless transmitter coupled to the graphics processing circuit and configured to receive and modulate a fourth portion of the processed graphics information and transmit the fourth portion of the processed graphics information as a fourth RF signal, and    wherein the computer system further comprises:    a third integrated circuit comprising: 
 a third wireless receiver configured to receive and demodulate the third RF signal and provide third portion of the processed graphics information;  
 a fourth wireless receiver configured to receive and demodulate the fourth RF signal and provide the fourth portion of the processed graphics information; and  
 an output circuit configured to receive the third and fourth portions of the processed graphics information and provide a second output.  
   
     
     
         14 . The computer system of  claim 13  further comprising: 
 a first monitor configured to receive the first output from the second integrated circuit;    a second monitor configure to receive the second output from the third integrated circuit; and    a computer configured to provide graphics information to the first integrated circuit.    
     
     
         15 . The computer system of  claim 14  wherein the computer is coupled to receive graphics information from the Internet.  
     
     
         16 . An integrated circuit comprising: 
 a graphics processing unit coupled to a graphics memory interface;    a packet generator circuit coupled to the graphics memory interface;    an encapsulator coupled to the packet generator;    a demultiplexer coupled to the encapsulator;    a first wireless transmitter coupled to the demultiplexer; and    a second wireless transmitter coupled to the demultiplexer.    
     
     
         17 . The integrated circuit of  claim 16  wherein the graphics memory interface is configured to store and retrieve data to and from a DRAM, and the graphics processing unit is configured to receive graphics information from a CPU.  
     
     
         18 . A computer system comprising: 
 a first integrated circuit comprising: 
 a graphics processing unit;  
 a first transceiver coupled to the graphics processing unit; and  
 a second transceiver coupled to the graphics processing unit; and  
   a second integrated circuit comprising: 
 a third transceiver;  
 a fourth transceiver; and  
 an output circuit coupled to the first and second transceivers,  
   wherein the first and second transceivers are configured to transmit first status information and first graphics information.    
     
     
         19 . The computer system of  claim 18  wherein the first and second transceivers are further configured to receive second status information and second graphics information.  
     
     
         20 . The computer system of  claim 19  wherein the first status information comprises screen resolution settings and an indication of a number of transceivers used by the first integrated circuit, and 
 wherein the second status information comprises an indication of the received signal strength.    
     
     
         21 . An integrated circuit comprising: 
 a first wireless receiver;    a second wireless receiver; and    an output circuit coupled to the first wireless receiver and the second wireless receiver,    wherein the output circuit is configured to provide a signal to a monitor.    
     
     
         22 . The integrated circuit of  claim 21  further comprising: 
 a multiplexer coupled to the first wireless receiver and the second wireless receiver; and    a decapsulator circuit and a reorder circuit coupled between the multiplexer and the output circuit.