US2006148269A1PendingUtilityA1

Semiconductor devices and methods for depositing a dielectric film

Assignee: MICRON TECHNOLOGY INCPriority: Feb 27, 2004Filed: Mar 21, 2006Published: Jul 6, 2006
Est. expiryFeb 27, 2024(expired)· nominal 20-yr term from priority
Inventors:Don Powell
H10P 14/69215H10P 14/6927H10P 14/6682H10P 14/6334C23C 16/402C23C 16/308
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Claims

Abstract

Embodiments provide methods and apparatuses for chemical vapor depositing a dielectric film, and various structures, devices, and systems, which incorporate dielectric elements formed from the dielectric film. The method includes heating a chamber, within which a substrate is located, to a temperature sufficient to thermally decompose an oxidizing component. A gas flow is passed over the substrate to deposit the dielectric film. To form an oxide, the gas flow includes a silicon bearing component, the oxidizing component, and a chloride component. The silicon bearing component and the chloride component are distinct from each other. To form an oxynitride, the gas flow further includes an ammonia component. The silicon bearing component can be substituted by a tantalum bearing component or an aluminum bearing component, to form other types of oxynitrides.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising: 
 a substrate; and    a dielectric element, which has a residual chlorine, the dielectric element including at least a portion of a chemical vapor deposited dielectric layer formed from passing a gas flow over the substrate to deposit the dielectric layer, wherein the gas flow includes a silicon bearing component, an oxidizing component, and a chloride component, and wherein the silicon bearing component and the chloride component are distinct from each other.    
   
   
       2 . The semiconductor device as claimed in  claim 1 , wherein the semiconductor device comprises a semiconductor capacitive device, and the semiconductor device further comprises: 
 a first electrode disposed on and insulated from the substrate, wherein the dielectric layer is disposed on the first electrode; and    a second electrode disposed on the dielectric element.    
   
   
       3 . The semiconductor device as claimed in  claim 1 , wherein the semiconductor device comprises: 
 an optical waveguide device, wherein the substrate includes a first cladding layer, and wherein the dielectric element includes an oxide layer, and wherein the optical waveguide device further includes a second cladding layer overlying the dielectric element.    
   
   
       4 . The semiconductor device as claimed in  claim 1 , wherein the semiconductor device comprises a memory cell.  
   
   
       5 . The semiconductor device as claimed in  claim 1 , wherein the semiconductor device includes at least one floating gate transistor.  
   
   
       6 . The semiconductor device as claimed in  claim 1 , wherein the semiconductor device includes at least one insulated gate transistor.  
   
   
       7 . A memory array that is fabricated on a substrate, the memory array including a plurality of memory cells, each memory cell comprising: 
 a substrate; and    a dielectric element, which has a residual chlorine, the dielectric element including at least a portion of a chemical vapor deposited dielectric layer formed from passing a gas flow over the substrate to deposit the dielectric layer, wherein the gas flow includes a silicon bearing component, an oxidizing component, and a chloride component, and wherein the silicon bearing component and the chloride component are distinct from each other.    
   
   
       8 . A memory device, comprising: 
 an array of memory cells including: 
 a substrate, and  
 a dielectric element, which has a residual chlorine, the dielectric element including at least a portion of a chemical vapor deposited dielectric layer formed from passing a gas flow over the substrate to deposit the dielectric layer, wherein the gas flow includes a silicon bearing component, an oxidizing component, and a chloride component, and wherein the silicon bearing component and the chloride component are distinct from each other;  
   a row access circuit coupled to the array of memory cells;    a column access circuit coupled to the array of memory cells; and    an address decoder circuit coupled to the row access circuit and the column access circuit.    
   
   
       9 . A semiconductor die, comprising: 
 a substrate; and    an integrated circuit supported by the substrate and having a plurality of integrated circuit devices, wherein an integrated circuit device includes a dielectric element, which has a residual chlorine, the dielectric element including at least a portion of a chemical vapor deposited dielectric layer formed from passing a gas flow over the substrate to deposit the dielectric layer, wherein the gas flow includes a silicon bearing component, an oxidizing component, and a chloride component, and wherein the silicon bearing component and the chloride component are distinct from each other.    
   
   
       10 . An electronic system comprising: 
 a processor; and    an integrated circuit coupled to the processor, wherein the integrated circuit further includes: 
 a substrate; and 
 an integrated circuit supported by the substrate and having a plurality of integrated circuit devices, wherein an integrated circuit device includes a dielectric element, which has a residual chlorine, the dielectric element including at least a portion of a chemical vapor deposited dielectric layer formed from passing a gas flow over the substrate to deposit the dielectric layer, wherein the gas flow includes a silicon bearing component, an oxidizing component, and a chloride component, and wherein the silicon bearing component and the chloride component are distinct from each other.  
 
   
   
   
       11 . The semiconductor device of  claim 1 , wherein the dielectric element is formed from a blanket dielectric deposition over substantially the entirety of a surface of the substrate.  
   
   
       12 . The semiconductor device of  claim 11 , wherein the dielectric element includes an oxide layer.  
   
   
       13 . The semiconductor device of  claim 1 , wherein the reaction gasses include ammonia, and wherein the dielectric element includes an oxynitride film.  
   
   
       14 . The semiconductor device of  claim 1 , wherein the dielectric element includes tantalum.  
   
   
       15 . The memory array of  claim 7 , wherein the dielectric element includes a dielectric blanket.  
   
   
       16 . The memory array of  claim 15 , wherein the dielectric blanket is formed substantially over an entirety of surface of the substrate.  
   
   
       17 . The memory array of  claim 15 , wherein the memory cell includes a first electrode and a second electrode with the dielectric blanket being between the first electrode and the second electrode.  
   
   
       18 . The memory array of  claim 17 , wherein the dielectric blanket includes at least one of tantalum and aluminum.  
   
   
       19 . The memory array of  claim 18 , wherein the first electrode includes at least one of a polycide and a silicide.

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