US2006167646A1PendingUtilityA1

Method and apparatus for performing testing of interconnections

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Assignee: YEUNG PHILIPPriority: Sep 15, 2003Filed: Mar 28, 2006Published: Jul 27, 2006
Est. expirySep 15, 2023(expired)· nominal 20-yr term from priority
Inventors:Philip Yeung
G01R 31/31855
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Claims

Abstract

The present invention provides a method and apparatus configured to allow testing of interconnections between components in a system. The present invention utilizes a source of a known pattern, for example a pattern buffer, in a first component of the system and a capture buffer located in a second component of the system.

Claims

exact text as granted — not AI-modified
1 . A method for performing testing of an interconnect between components of a system comprising the steps of: 
 loading a first pattern into a controller pattern buffer of a controller;    transmitting the first pattern to a component of the components;    capturing the transmitted first pattern in a component capture buffer of the component;    performing a first comparison to compare the captured first pattern to the first pattern; and    identifying any interconnect faults based on the first comparison.

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