US2006175717A1PendingUtilityA1
Semiconductor device and method of making the same
Est. expiryOct 23, 2020(expired)· nominal 20-yr term from priority
Inventors:Yasumasa Kasuya
H10W 72/5522H10W 74/00H10W 72/0198H10W 72/5449H10W 90/756H10W 70/411
47
PatentIndex Score
0
Cited by
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References
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Claims
Abstract
A semiconductor device and a method of making a semiconductor device are provided, wherein the device includes a die-pad, a semiconductor chip and a sealing resin. The die-pad has a first surface and a second surface opposite to the first surface. The second surface includes an exposed portion and a retreated portion around the exposed portion. The semiconductor chip is mounted on the first surface of the die-pad. The sealing resin covers the die-pad and the semiconductor chip, exposes the exposed portion, and is held in contact with the retreated portion.
Claims
exact text as granted — not AI-modified1 - 10 . (canceled)
11 . A method of making a semiconductor device comprising the steps of:
punching a conductive frame to form a die-pad with a slit, the die-pad including an upper surface and a lower surface opposite to the upper surface, the slit extending through the die-pad at a location adjacent to a peripheral edge of the die-pad; etching the lower surface along the peripheral edge of the die-pad so as to form a thin-walled portion in the die-pad in a manner such that the slit is opened at the thin-walled portion; mounting a semiconductor chip on the upper surface of the die-pad; bonding a wire to the semiconductor chip and to the die-pad; and sealing the semiconductor chip with a sealing resin in a manner such that the lower surface of the die-pad is exposed.
12 . The method according to claim 11 , wherein the thin-walled portion is defined by a retreated surface.
13 . The method according to claim 11 , wherein the sealing resin extends under the thin-walled portion so as not to expose an opening of the slit.
14 . The method according to claim 11 , wherein the slit extends along a side surface of the semiconductor chip around the semiconductor chip.
15 . The method according to claim 11 , wherein the wire is connected at one end thereof to the semiconductor chip and connected at another end thereof to the die-pad at a portion between a peripheral edge of the die-pad and the slit.Join the waitlist — get patent alerts
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