Method of forming copper wiring layer

Abstract

A method of forming a copper wiring layer, which includes forming a pattern of copper seed layer on a substrate, and forming a copper wiring pattern on the pattern of copper seed layer by means of electroless plating. At least one component of semiconductor device selected from the group consisting of the gate electrode, the source electrode, the drain electrode, and a wiring connected with at least one of these electrodes is formed by a method comprising forming a pattern of copper seed layer, and forming a copper wiring pattern on the pattern of copper seed layer by means of electroless plating.

1 . A method of forming a copper wiring layer, which comprises: 
 forming a pattern of copper seed layer on a substrate; and    forming a copper wiring layer on the pattern of copper seed layer by means of electroless plating.    
     
     
         2 . The method according to  claim 1 , wherein forming a pattern of copper seed layer is performed by a process comprising: 
 forming a copper seed layer on the substrate; and    etching the copper seed layer into a wiring pattern.    
     
     
         3 . The method according to  claim 2 , wherein forming a pattern of copper seed layer is performed by a process comprising: 
 forming at least one layer having a wiring pattern on the copper seed layer, said at least one layer having a wiring pattern being selected from a resist layer, an insulating layer and a metallic layer; and    etching the copper seed layer with said at least one layer having a wiring pattern being employed as a mask.    
     
     
         4 . The method according to  claim 1 , wherein a crystal face of the copper seed layer is oriented mainly in (111) plane.  
     
     
         5 . The method according to  claim 1 , wherein the copper wiring pattern is formed to have one configuration selected from the group consisting of electrodes, pads and wiring.  
     
     
         6 . The method according to  claim 1 , which further comprises forming an underlying barrier layer on the substrate before forming the copper seed layer; and etching the underlying barrier layer with the copper wiring layer being employed as a mask.  
     
     
         7 . The method according to  claim 1 , which further comprises forming a capping metal layer on a surface of the copper wiring layer in order to prevent the diffusion of copper.  
     
     
         8 . A method of forming a semiconductor device, which comprises: 
 forming a semiconductor layer on a substrate;    forming a gate insulating film and a gate electrode on the semiconductor layer;    forming a source region and a drain region by introducing an impurity into the semiconductor layer with the gate electrode being used as a mask; and    forming a source electrode connected with the source region and a drain electrode connected with the drain region;    wherein at least one component selected from the group consisting of the gate electrode, the source electrode, the drain electrode, and a wiring connected with at least one of these electrodes is formed through a method comprising:    forming a pattern of copper seed layer; and    forming a copper wiring layer on the pattern of copper seed layer by means of electroless plating.    
     
     
         9 . The method according to  claim 8 , wherein forming a pattern of copper seed layer is performed by a process comprising: 
 forming a copper seed layer on the substrate; and    etching the copper seed layer into a wiring pattern.    
     
     
         10 . The method according to  claim 9 , wherein forming a pattern of copper seed layer is performed by a process comprising: 
 forming at least one layer having a wiring pattern on the copper seed layer, said at least one layer having a wiring pattern being selected from a resist layer, an insulating layer and a metallic layer; and    etching the copper seed layer with said at least one layer having a wiring pattern being employed as a mask.    
     
     
         11 . The method according to  claim 8 , which further comprises forming an underlying barrier layer on the substrate before forming the copper seed layer; and etching the underlying barrier layer with the copper wiring layer being employed as a mask.