Light-emitting semiconductor chip and method for the manufacture thereof

Abstract

A semiconductor chip, particularly a radiation-emitting semiconductor chip, comprises an active thin-film layer in which a photon-emitting zone is formed, and a carrier substrate for the thin-film layer is arranged at a side of the thin-film layer faces away from the emission direction and is connected to it. At least one cavity via which a plurality of mesas is fashioned at the boundary between carrier substrate and thin-film layer is fashioned in the active thin-film layer proceeding from the carrier substrate.

1 . A semiconductor chip for a radiation-emitting optoelectronics component, comprising: 
 an active thin-film layer comprising a photon-emitting (active) zone;    a carrier substrate being arranged at a side of the thin-film layer that faces away from an emission direction and being connected to the thin-film layer;    at least one cavity; and    a plurality of mesas formed by the at least one cavity;    the plurality of mesas being fashioned in the thin-film layer at a side facing towards the carrier substrate; and    the thin film layer further comprising a cover layer connecting the mesas with each other, the active zone being arranged in a half of the mesas adjacent to the cover layer.    
   
   
       2 . The semiconductor chip according to  claim 1 , wherein a cross-section of the at least one cavity becomes smaller over its course away from the carrier substrate.  
   
   
       3 . The semiconductor chip according to  claim 1 , wherein the active thin-film layer comprises a layer sequence of the basis of In 1-x-y Al x Ga y P, wherein 0≦x≦1, 0≦y≦1, and x+y≦1.  
   
   
       4 . The semiconductor chip according to  claim 1 , wherein the cavities are fashioned so deep that they part the active zone.  
   
   
       5 . The semiconductor chip according to  claim 1 , wherein mesas are formed by a plurality of cavities only in those regions that represent radiation-generating regions of the thin-film layer.  
   
   
       6 . The semiconductor chip according to  claim 5 , wherein the mesas taper toward the carrier substrate.  
   
   
       7 . The semiconductor chip according to  claim 6 , wherein the mesas comprise concave lateral surfaces.  
   
   
       8 . The semiconductor chip according to  claim 1 , wherein at least one cavity is configured such that at least one trajectory of photons emitted by the active zone leads from a respective mesa to a neighboring mesa.  
   
   
       9 . The semiconductor chip according to  claim 8 , wherein the mesas taper toward the carrier substrate.  
   
   
       10 . The semiconductor chip according to  claim 9 , wherein the mesas comprise concave lateral surfaces.  
   
   
       11 . The semiconductor chip according to  claim 5 , wherein the mesas are fashioned in truncated pyramid shapes.  
   
   
       12 . The semiconductor chip according  claim 5 , further comprising: 
 a cover layer of the thin-film layer, said cover layer connecting the mesas, wherein the active zone is arranged in a half of the mesas neighboring the cover layer.    
   
   
       13 . The semiconductor chip according to  claim 5 , wherein the cover layer comprises a material that is substantially transparent for photons emitted by the active zone.  
   
   
       14 . The semiconductor chip according to  claim 5 , further comprising a cover layer that is highly doped.  
   
   
       15 . The semiconductor chip according to  claim 1 , further comprising a reflection layer that covers the mesas.  
   
   
       16 . The semiconductor chip according to  claim 15 , wherein the reflection layer comprises a metallization layer underlaid with an insulating layer.  
   
   
       17 . The semiconductor chip according to  claim 1 , wherein the active thin-film layer is between 5 μm and 50 μm thick.  
   
   
       18 . The semiconductor chip according to  claim 1 , wherein the active thin-film layer is between 5 μm and 25 μm thick.  
   
   
       19 . The semiconductor chip according to  claim 1 , wherein a depth of the at least one cavity is greater than half of the thickness of the thin-film layer.  
   
   
       20 . The semiconductor chip according to  claim 1 , further comprising: 
 an electrical contact surface of the carrier substrate at a side facing away from the thin-film layer, the carrier substrate configured to be electrically conductive.    
   
   
       21 . The semiconductor chip according to  claim 1 , further comprising: 
 an electrical contact surface of the carrier substrate at a surface next to the thin-film layer at a side facing toward the thin-film layer, the carrier substrate being electrically insulating or electrically conductive.    
   
   
       22 . The semiconductor chip according to  claim 1 , further comprising: 
 an optical anti-reflection layer configured to provide improved light outfeed, the anti-reflection layer being provided on a surface of the thin-film layer that lies opposite a fastening side.    
   
   
       23 . The semiconductor chip according to  claim 22 , wherein the optical anti-reflection layer is formed of silicon nitride.  
   
   
       24 . The semiconductor chip according to  claim 22 , wherein the optical anti-reflection layer is formed of conductive indium-tin-oxide.  
   
   
       25 . The semiconductor chip according to  claim 1 , further comprising: 
 one or more contact locations, wherein the thin-film layer comprises no cavity in the region opposite the one or more contact locations.    
   
   
       26 . The semiconductor chip according to  claim 1 , wherein the mesas taper in a direction toward the carrier substrate.  
   
   
       27 . The semiconductor chip according to  claim 26 , wherein the mesas have a truncated pyramid or conoidal frustum shape and side faces of the mesas are inclined relative to a direction of extent of the thin-film layer by an angle (p of between 5° and 60°.  
   
   
       28 . The semiconductor chip according to  claim 27 , wherein the mesas have a truncated pyramid or conoidal frustum shape and side faces of the mesas are inclined relative to a direction of extent of the thin-film layer by an angle φ of between 10° and 40°.  
   
   
       29 . The semiconductor chip according to  claim 27 , wherein the angle φ lies between 15° and 30°.  
   
   
       30 . A semiconductor chip for a radiation-emitting optoelectronics component, comprising: 
 an active thin-film layer comprising a photon-emitting (active) zone;    a carrier substrate being arranged at a side of the thin-film layer that faces away from an emission direction and being connected to the thin-film layer;    at least one cavity; and    a plurality of mesas formed by the at least one cavity;    the plurality of mesas being fashioned in the thin-film layer at a side facing towards the carrier substrate; and    the thin film layer having a thickness of less than 50 μm.    
   
   
       31 . A method for a simultaneous manufacture of a plurality of semiconductor chips for optoelectronics having an active thin-film layer in which an active zone that emits photons is formed, comprising: 
 epitaxially growing a layer sequence on a growth substrate wafer, the layer sequence containing a zone that emits the photons;    fashioning at least one cavity in the layer sequence such that a plurality of mesas arise in the layer sequence;    applying the growth substrate wafer together with the layer sequence onto a carrier substrate such that the mesas face toward the carrier substrate;    connecting the layer sequence to the carrier substrate wafer; and    separating the carrier substrate together with the layer sequence along parting tracks to form semiconductor chips.    
   
   
       32 . The method according to  claim 31 , wherein the connecting of the layer sequence to the carrier substrate wafer comprises soldering or gluing.  
   
   
       33 . The method according to  claim 31 , further comprising: 
 parting the layer sequence along the parting tracks before connecting the layer sequence to the carrier substrate wafer.