System and apparatus for in-system programming

Abstract

Embodiments of the present invention relate to machines that perform in-system programming of programmable devices that are attached to assembled printed circuit boards. In accordance with one aspect, multiple nonvolatile devices may be programmed in a single session at their normal maximum programming speeds. Different nonvolatile devices on a board can receive different data. Data variables can be inserted so that not all boards receive identical data. A master controller sends image files and algorithm information to a subsidiary controller. The subsidiary controller executes a device algorithm, and an FPGA executes a bus algorithm. Embodiments of the present invention can be designed as stand-alone systems or to operate cooperatively with an automatic tester, so that testing and device programming can take place in a single operation using a single fixture to hold the circuit board.

1 . An apparatus for concurrently programming a plurality of in-system programmable devices connected to a circuit board, comprising: 
 a host computer; and    a communication interface in communication with the host computer and positioned near at least one of the plurality of in-system programmable devices connected to the circuit board; wherein the apparatus is capable of in-system programming of the plurality of in-system programmable devices and wherein at least two of the plurality of in-system programmable devices are different.    
   
   
       2 . The apparatus of  claim 1 , further comprising: 
 a subsidiary processing circuit located proximally to the circuit board for receiving programming for the plurality of in-system programmable devices and for transferring the programming to the communication interface for in-system programming of the plurality of communication devices.    
   
   
       3 . The apparatus of  claim 2 , wherein the programming is stored in a memory located on the subsidiary processing circuit.  
   
   
       4 . The apparatus of  claim 2 , wherein the subsidiary processing circuit is part of the host computer.  
   
   
       5 . The apparatus of  claim 2 , wherein the subsidiary processing circuit is part of the communication interface.  
   
   
       6 . The apparatus of  claim 1 , wherein the host computer includes an application development system configured to interface with a user to receive device specific information for use in in-system programming of the plurality of in-system programmable devices.  
   
   
       7 . The apparatus of  claim 1 , wherein the total time taken to program the plurality of in-system programmable devices is approximately the time taken to program the in-system programmable device that takes the longest amount of time to program.  
   
   
       8 . The apparatus of  claim 1 , wherein the apparatus is configured as part of an automatic test equipment.  
   
   
       9 . A computer-readable medium having computer executable components for developing applications for the concurrent programming of a plurality of in-system programmable devices, comprising: 
 a selector component configured to select an in-system programmable device type, identify a data file representing files of digital information to be programmed into at least one of the plurality of in-system programmable devices; and    a programming generation component for generating programming instructions for use in programming at least one of the plurality in-system programmable devices.    
   
   
       10 . The computer-readable medium of  claim 9 , wherein the programming instructions include: 
 executable instructions for programming at least one of the plurality of in-system programmable devices;    subsidiary programming instructions configured for use by a subsidiary processing circuit; and    programming information for use in generating an in-system programmable protocol.    
   
   
       11 . The computer-readable medium of  claim 10 , wherein the programming instructions further include: 
 a configuration file including information representing an in-system programmable device algorithm.    
   
   
       12 . An apparatus for communicating with a plurality of in-system programmable devices located on at least one circuit board, comprising: 
 a communication interface positioned near the plurality of in-system programmable devices and configured to communicate with the plurality of in-system programmable devices;    a communication controller connected to the communication interface and configured to control communication with the plurality of in-system programmable devices; and    wherein the apparatus is configured to concurrently program the plurality of in-system programmable devices located on the at least one circuit board during manufacture of the circuit board.    
   
   
       13 . The apparatus of  claim 12 , wherein the apparatus may be used to program any type of in-system programmable device.  
   
   
       14 . The apparatus of  claim 12 , wherein the communication controller is capable of programming the plurality of in-system programmable devices concurrent; and wherein at least two of the in-system programmable devices require different programming.  
   
   
       15 . The apparatus of  claim 12 , wherein the plurality of in-system programmable devices are located on a plurality of circuit boards.  
   
   
       16 . The apparatus of  claim 12 , wherein the communication controller is capable, via the communication interface, to pass common data to the plurality of in-system programmable devices concurrently.  
   
   
       17 . The apparatus of  claim 12 , wherein the communication controller is capable, via the communication interface, to pass device specific data to respective in-system programmable devices.  
   
   
       18 . The apparatus of  claim 12 , further comprising: 
 a in-system programmable device tester for testing the plurality of in-system programmable devices, wherein the communication interface may exclude from programming any of the plurality of in-system programmable devices that did not satisfy a test.    
   
   
       19 . A method for providing information regarding a plurality of in-system programmable devices located on a circuit board, comprising: 
 receiving an identification of in-system programmable device specific information;    determining the device specific information; and    providing a representation of a wiring arrangement between the plurality of in-system programmable devices and a communication interface.    
   
   
       20 . The method of  claim 19 , further comprising: 
 receiving a indication of a wiring connection between the communication interface and an in-system programmable device; and    providing an indication of the represented wiring arrangement for the connection.    
   
   
       21 . The method of  claim 20 , wherein the indication is providing by a probe placed on the connection.  
   
   
       22 . The method of  claim 19 , wherein the device specific information is provided by a custom configuration file.  
   
   
       23 . The method of  claim 19 , wherein the device specific information is used to determine the appropriate device algorithm and bus algorithm for use in programming at least one of the in-system programmable devices.