Output-Compensated Buffers with Source-Follower Input Structure and Image Capture Devices Using Same

Abstract

An output-compensated buffer includes a buffer circuit that receives an input signal and produces an output signal responsive thereto at an output terminal, the buffer circuit including an input source-follower circuit that receives the input signal. A feedback circuit is connected to the output terminal and to the input source follower circuit and operative to vary an input capacitance of the source follower circuit responsive to the output signal at the output terminal. The input source follower circuit preferably includes a bias terminal coupled to a power source, and the feedback circuit is preferably capacitively coupled to the bias terminal. According to another aspect, an image capture device includes a charged coupled device (CCD) that generates a video signal. A buffer circuit is responsive to the CCD and operative to receives the video signal and produce an output signal responsive thereto at an output terminal, the buffer circuit including an input source-follower circuit that receives the video signal. A feedback circuit is connected to the output terminal and to the input source follower circuit and operative to vary an input capacitance of the source follower circuit responsive to the output signal at the output terminal.

1 . An output-compensated buffer, comprising: 
 a buffer circuit that receives an input signal and produces an output signal responsive thereto at an output terminal, said buffer circuit including an input source-follower circuit that receives the input signal; and    a feedback circuit having an input connected to said output terminal and an output capacitively connected to a bias terminal of said input source follower circuit and operative to vary an input capacitance of said source follower circuit responsive to the output signal at said output terminal.    
   
   
       2 . An output-compensated buffer according to  claim 1 , wherein said feedback circuit is operative to variably capacitively couple the bias terminal to the power source responsive to the output signal at the output terminal.  
   
   
       3 . An output-compensated buffer according to  claim 1:   wherein said source follower circuit comprises: 
 a first transistor having a source terminal, a gate terminal configured to receive the input signal, and a drain terminal connected to the power source through a resistor; and  
 a second transistor having a drain terminal connected to the source terminal of the first transistor, a source terminal connected to a signal ground and a gate terminal configured to receive a control signal; and  
   wherein said feedback circuit is coupled to the drain terminal of said first transistor.    
   
   
       4 . An output-compensated buffer according to  claim 3 , wherein said feedback circuit is capacitively coupled to the drain terminal of the first transistor.  
   
   
       5 . An output-compensated buffer according to  claim 4 , wherein said feedback circuit is operative to variably capacitively couple the drain terminal of the first transistor to the power source responsive to the output signal at the output terminal.  
   
   
       6 . An output-compensated buffer according to  claim 1 , wherein the output terminal of the buffer circuit is an output terminal of the source follower circuit.  
   
   
       7 . An output-compensated buffer according to  claim 1 , wherein the buffer circuit further comprises a second source follower circuit connected to an output of the input source follower circuit and operative to produce the output signal responsive to the input signal applied to the input source follower circuit.  
   
   
       8 . An output-compensated buffer, comprising: 
 a buffer circuit that receives an input signal and produces an output signal responsive thereto at an output terminal, said buffer circuit including an input source-follower circuit that has an input terminal that receives the input signal and a bias terminal that receives a bias voltage from a power source; and    a feedback circuit connected to said output terminal and to said input source follower circuit and operative to variably couple the power source and the bias terminal via a capacitor.    
   
   
       9 . An output-compensated buffer according to  claim 8:   wherein said source follower circuit comprises: 
 a first transistor having a source terminal, a gate terminal configured to receive the input signal, and a drain terminal connected to the power source through a resistor; and  
 a second transistor having a drain terminal connected to the source terminal of the first transistor, a source terminal connected to a signal ground and a gate terminal configured to receive a control signal; and  
   wherein said feedback circuit is coupled to the drain terminal of said first transistor.    
   
   
       10 . An output-compensated buffer according to  claim 8 , wherein the output terminal of the buffer circuit is an output terminal of the source follower circuit.  
   
   
       11 . An output-compensated buffer according to  claim 8 , wherein the buffer circuit further comprises a source follower circuit connected to an output of the input source follower circuit and operative to produce the output signal responsive to the input signal applied to the input source follower circuit.  
   
   
       12 . An image capture device, comprising: 
 a charged coupled device (CCD) that generates a video signal;    a buffer circuit responsive to the CCD and operative to receive the video signal and produce an output signal responsive thereto at an output terminal, said buffer circuit including an input source-follower circuit that receives the video signal; and    a feedback circuit having an input connected to said output terminal and an output capacitively coupled to a bias terminal of said input source follower circuit and operative to vary an input capacitance of said source follower circuit responsive to the output signal at said output terminal.    
   
   
       13 . An image capture device according to  claim 12 , wherein said feedback circuit is operative to variably capacitively couple the bias terminal to the power source responsive to the output signal at the output terminal.