US2006235563A1PendingUtilityA1

Method and apparatus for providing intra-tool monitoring and control

Assignee: PARIKH SUKETUPriority: Aug 24, 2001Filed: May 30, 2006Published: Oct 19, 2006
Est. expiryAug 24, 2021(expired)· nominal 20-yr term from priority
H10P 74/23G05B 19/4187G05B 19/41875Y02P90/02G05B 2219/32179G05B 2219/45031G05B 2219/32182
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Claims

Abstract

An apparatus for performing intra-tool monitoring and control within a multi-step processing system. The apparatus provides a metrology station located between each of a plurality of semiconductor wafer processing tools such that measurements can be made on wafers as they are passed from one tool to another providing intra tool monitoring. The data collected by the metrology station is coupled to a metrology data analyzer, which determines whether any of the plurality of wafer processing tools should be adjusted to improve the processing of the overall wafer. As such, the output of the metrology data analyzer provides control parameters to process controllers connected controllers connected to each of the tools within the semiconductor wafer processing system. Consequently, the operation of the metrology stations and the metrology data analyzer provides both feed forward and feed back data to control the tools based upon certain information that is gathered within the metrology station.

Claims

exact text as granted — not AI-modified
1 . Apparatus for monitoring and controlling a multi-step semiconductor wafer processing system comprising: 
 a plurality of independently operating processing tools;    at least one metrology station for testing a semiconductor wafer after one or more process steps are performed by the plurality of independently operating processing tools;    a metrology data analyzer for analyzing data produced by the at least one metrology station and producing control parameters for said plurality of independently operating processing tools; and    a plurality of process controllers for selectively applying the control parameters to the plurality of independently operating processing tools.    
   
   
       2 . The apparatus of  claim 1  wherein said at least one metrology station performs blanket and patterned wafer tests.  
   
   
       3 . The apparatus of  claim 1  wherein the independently operating processing tools comprise one or more of: 
 an etch chamber, a chemical-mechanical polishing tool, an electrochemical plating cell, a physical vapor deposition chamber and a chemical vapor deposition chamber.    
   
   
       4 . The apparatus of  claim 1  wherein the multi-step semiconductor wafer processing system produces a copper interconnect using independently operating processing tools comprising: 
 a barrier and seed layer deposition tool, an electrochemical plating cell and a chemical-mechanical polishing tool.    
   
   
       5 . The apparatus of  claim 4  further comprising a controller containing a computer-readable medium having stored thereon a plurality of instructions, the plurality of instructions including instructions which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 depositing a barrier and seed layer within a trench formed in the semiconductor wafer;    generating, in response to deposition results, first control parameters;    performing electrochemical plating to deposit a copper layer upon the barrier and seed layer;    generating, in response to plating results, second control parameters;    polishing upon the copper layer;    generating, in response to polishing results, third control parameters; and    controlling at least one of the polishing process in response to the first control parameters or the deposition process in response to the third control parameters.    
   
   
       6 . The apparatus of  claim 5 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 etching the trench into the semiconductor wafer;    testing a trench geometry;    generating, in response to the trench geometry, fourth control parameters for the electrochemical plating tool, the barrier and seed layer deposition tool, and the chemical-mechanical polishing tool; and    using the fourth control parameters to process the semiconductor wafer having the trench geometry.    
   
   
       7 . The apparatus of  claim 5 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 controlling at least one of control radial pressure profile and the rotational speed of the polishing pad in response to at least one of the first, second or third control parameters.    
   
   
       8 . The apparatus of  claim 5 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 setting at least one of total pressure, radial pressure, slurry flow, rotation speed and time of CMP processing in response to at least one of the first, second or third control parameters.    
   
   
       9 . The apparatus of  claim 5 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 controlling at least one of power, pressure, bias, time of gas flows to change deposition thickness in response to at least one of the first, second or third control parameters.    
   
   
       10 . The apparatus of  claim 5 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 controlling at least one of electroless thickness, patch thickness, current or pulse sequence, or additives to compensate for at least one of voids or planarization issues.    
   
   
       11 . The apparatus of  claim 5 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 tuning plating parameters of subsequently plated wafers in response to gap fill information.    
   
   
       12 . The apparatus of  claim 11 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 controlling at least one of current density, rotation speed, and anode to wafer distance in response to the gap fill information.    
   
   
       13 . The apparatus of  claim 11 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 generating control parameters selected from the group consisting of barrier seed step coverage of a trench and via having a specific size aspect ratio, gap fill, void detection, planarization, dishing, erosion, copper thickness, trench depth, dielectric constant, residual metal on a comb structure, via or snake open in a standard structure based on a voltage contrast or two-probe measurement, barrier thickness, copper seed thickness, copper thickness, copper bulk resistance, dielectric thickness, dielectric constant, presence of particles, presence of residue and systematic process defects.    
   
   
       14 . The apparatus of  claim 4  further comprising a controller containing a computer-readable medium having stored thereon a plurality of instructions, the plurality of instructions including instructions which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 depositing a barrier and seed layer within a trench formed in the semiconductor wafer;    testing a barrier and seed layer thickness;    generating, in response to the barrier and seed layer thickness, first control parameters for the electrochemical plating tool and the barrier and seed layer deposition tool;    performing electrochemical plating to deposit a copper layer upon the barrier and seed layer in accordance with the control parameters;    testing at least one of copper thickness and resistivity;    generating, in response to the testing at least one of copper thickness and resistivity, second control parameters for the electrochemical plating tool, the barrier and seed layer deposition tool, and the chemical-mechanical polishing tool;    performing chemical-mechanical polishing upon the copper layer in accordance with the second control parameters;    testing a copper uniformity and residue of the polished semiconductor wafer;    generating, in response to the copper uniformity and residue, third control parameters for the electrochemical plating tool, the barrier and seed layer deposition tool, and the chemical-mechanical polishing tool; and    using the third control parameters in processing subsequent semiconductor wafers.    
   
   
       15 . The apparatus of  claim 14 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 etching the trench into the semiconductor wafer;    testing a trench geometry;    generating, in response to the trench geometry, fourth control parameters for the electrochemical plating tool, the barrier and seed layer deposition tool, and the chemical-mechanical polishing tool; and    using the fourth control parameters to process the semiconductor wafer having the trench geometry.    
   
   
       16 . The apparatus of  claim 14 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 setting at least one of control radial pressure profile and the rotational speed of the polishing pad in response to at least one of the second or third control parameters.    
   
   
       17 . The apparatus of  claim 14 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 setting at least one of total pressure, radial pressure, slurry flow, rotation speed and time of CMP processing in response to at least one of the first or third control parameters; and    controlling at least one of power, pressure, bias, time of gas flows to change deposition thickness in response to at least one of the first, second or third control parameters.    
   
   
       18 . The apparatus of  claim 14 , wherein the computer-readable medium further contains instructions, which, when executed by the controller, cause the multi-step semiconductor wafer processing system to perform the steps of: 
 tuning plating parameters of subsequently plated wafers in response to gap fill information.    
   
   
       19 . An apparatus comprising: 
 a barrier and seed layer deposition tool;    a electrochemical plating tool;    a chemical-mechanical polishing tool;    at least one metrology station for testing a semiconductor wafer after one or more process steps are performed by the deposition tool, plating tool and the polishing tool;    a controller interfaced with the at least one metrology station, the deposition tool, plating tool and the polishing tool; and    a computer-readable medium having stored thereon a plurality of instructions, the plurality of instructions including instructions which, when executed by the controller, cause the deposition tool, plating tool and the polishing tool to perform the steps of: 
 depositing a barrier and seed layer within a trench formed in the semiconductor wafer;  
 generating, in response to deposition results, first control parameters;  
 performing electrochemical plating to deposit a copper layer upon the barrier and seed layer;  
 polishing upon the copper layer; and  
 controlling the polishing process in response to the first control parameters.  
   
   
   
       20 . An apparatus comprising: 
 a barrier and seed layer deposition tool;    a electrochemical plating tool;    a chemical-mechanical polishing tool;    at least one metrology station for testing a semiconductor wafer after one or more process steps are performed by the deposition tool, plating tool and the polishing tool;    a controller interfaced with the at least one metrology station, the deposition tool, plating tool and the polishing tool; and 
 depositing a barrier and seed layer within a trench formed in the semiconductor wafer;  
 performing electrochemical plating to deposit a copper layer upon the barrier and seed layer;  
 polishing upon the copper layer;  
 generating, in response to polishing results, first control parameters; and  
 controlling the deposition process in response to the first control parameters.

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